mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-19 10:44:14 +08:00
8939b3504d
Most of the regulator data structures are local to the board file, but not made static. Fix this. Also make the nand partition table static. This gets rid of all the sparse warnings for this file. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
425 lines
9.9 KiB
C
425 lines
9.9 KiB
C
/*
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* Critical Link MityOMAP-L138 SoM
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*
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* Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of
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* any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/partitions.h>
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#include <linux/regulator/machine.h>
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#include <linux/i2c.h>
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#include <linux/i2c/at24.h>
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#include <linux/etherdevice.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <mach/common.h>
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#include <mach/cp_intc.h>
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#include <mach/da8xx.h>
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#include <mach/nand.h>
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#include <mach/mux.h>
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#define MITYOMAPL138_PHY_ID "0:03"
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#define FACTORY_CONFIG_MAGIC 0x012C0138
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#define FACTORY_CONFIG_VERSION 0x00010001
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/* Data Held in On-Board I2C device */
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struct factory_config {
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u32 magic;
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u32 version;
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u8 mac[6];
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u32 fpga_type;
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u32 spare;
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u32 serialnumber;
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char partnum[32];
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};
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static struct factory_config factory_config;
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static void read_factory_config(struct memory_accessor *a, void *context)
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{
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int ret;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
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if (ret != sizeof(struct factory_config)) {
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pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
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ret);
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return;
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}
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if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
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pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
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factory_config.magic);
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return;
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}
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if (factory_config.version != FACTORY_CONFIG_VERSION) {
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pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
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factory_config.version);
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return;
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}
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pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
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pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
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if (is_valid_ether_addr(factory_config.mac))
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memcpy(soc_info->emac_pdata->mac_addr,
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factory_config.mac, ETH_ALEN);
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else
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pr_warning("MityOMAPL138: Invalid MAC found "
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"in factory config block\n");
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}
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static struct at24_platform_data mityomapl138_fd_chip = {
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.byte_len = 256,
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.page_size = 8,
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.flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
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.setup = read_factory_config,
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.context = NULL,
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};
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static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
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.bus_freq = 100, /* kHz */
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.bus_delay = 0, /* usec */
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};
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/* TPS65023 voltage regulator support */
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/* 1.2V Core */
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static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = {
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{
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.supply = "cvdd",
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},
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};
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/* 1.8V */
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static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = {
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{
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.supply = "usb0_vdda18",
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},
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{
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.supply = "usb1_vdda18",
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},
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{
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.supply = "ddr_dvdd18",
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},
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{
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.supply = "sata_vddr",
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},
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};
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/* 1.2V */
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static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = {
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{
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.supply = "sata_vdd",
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},
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{
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.supply = "usb_cvdd",
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},
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{
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.supply = "pll0_vdda",
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},
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{
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.supply = "pll1_vdda",
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},
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};
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/* 1.8V Aux LDO, not used */
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static struct regulator_consumer_supply tps65023_ldo1_consumers[] = {
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{
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.supply = "1.8v_aux",
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},
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};
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/* FPGA VCC Aux (2.5 or 3.3) LDO */
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static struct regulator_consumer_supply tps65023_ldo2_consumers[] = {
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{
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.supply = "vccaux",
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},
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};
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static struct regulator_init_data tps65023_regulator_data[] = {
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/* dcdc1 */
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{
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.constraints = {
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.min_uV = 1150000,
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.max_uV = 1350000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers),
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.consumer_supplies = tps65023_dcdc1_consumers,
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},
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/* dcdc2 */
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{
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.valid_ops_mask = REGULATOR_CHANGE_STATUS,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers),
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.consumer_supplies = tps65023_dcdc2_consumers,
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},
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/* dcdc3 */
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{
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.constraints = {
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.min_uV = 1200000,
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.max_uV = 1200000,
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.valid_ops_mask = REGULATOR_CHANGE_STATUS,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers),
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.consumer_supplies = tps65023_dcdc3_consumers,
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},
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/* ldo1 */
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{
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.valid_ops_mask = REGULATOR_CHANGE_STATUS,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers),
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.consumer_supplies = tps65023_ldo1_consumers,
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},
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/* ldo2 */
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{
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.constraints = {
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.min_uV = 2500000,
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.max_uV = 3300000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS,
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.boot_on = 1,
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},
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.num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers),
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.consumer_supplies = tps65023_ldo2_consumers,
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},
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};
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static struct i2c_board_info __initdata mityomap_tps65023_info[] = {
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{
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I2C_BOARD_INFO("tps65023", 0x48),
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.platform_data = &tps65023_regulator_data[0],
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},
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{
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I2C_BOARD_INFO("24c02", 0x50),
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.platform_data = &mityomapl138_fd_chip,
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},
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};
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static int __init pmic_tps65023_init(void)
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{
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return i2c_register_board_info(1, mityomap_tps65023_info,
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ARRAY_SIZE(mityomap_tps65023_info));
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}
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/*
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* MityDSP-L138 includes a 256 MByte large-page NAND flash
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* (128K blocks).
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*/
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static struct mtd_partition mityomapl138_nandflash_partition[] = {
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{
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.name = "rootfs",
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.offset = 0,
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.size = SZ_128M,
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.mask_flags = 0, /* MTD_WRITEABLE, */
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},
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{
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.name = "homefs",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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},
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};
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static struct davinci_nand_pdata mityomapl138_nandflash_data = {
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.parts = mityomapl138_nandflash_partition,
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.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16,
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.ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
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};
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static struct resource mityomapl138_nandflash_resource[] = {
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{
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.start = DA8XX_AEMIF_CS3_BASE,
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.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = DA8XX_AEMIF_CTL_BASE,
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.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device mityomapl138_nandflash_device = {
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.name = "davinci_nand",
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.id = 0,
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.dev = {
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.platform_data = &mityomapl138_nandflash_data,
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},
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.num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
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.resource = mityomapl138_nandflash_resource,
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};
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static struct platform_device *mityomapl138_devices[] __initdata = {
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&mityomapl138_nandflash_device,
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};
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static void __init mityomapl138_setup_nand(void)
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{
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platform_add_devices(mityomapl138_devices,
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ARRAY_SIZE(mityomapl138_devices));
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}
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static struct davinci_uart_config mityomapl138_uart_config __initdata = {
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.enabled_uarts = 0x7,
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};
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static const short mityomap_mii_pins[] = {
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DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
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DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
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DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
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DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
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DA850_MDIO_D,
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-1
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};
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static const short mityomap_rmii_pins[] = {
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DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
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DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
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DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
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DA850_MDIO_D,
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-1
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};
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static void __init mityomapl138_config_emac(void)
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{
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void __iomem *cfg_chip3_base;
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int ret;
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u32 val;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */
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cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
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val = __raw_readl(cfg_chip3_base);
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if (soc_info->emac_pdata->rmii_en) {
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val |= BIT(8);
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ret = davinci_cfg_reg_list(mityomap_rmii_pins);
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pr_info("RMII PHY configured\n");
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} else {
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val &= ~BIT(8);
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ret = davinci_cfg_reg_list(mityomap_mii_pins);
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pr_info("MII PHY configured\n");
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}
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if (ret) {
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pr_warning("mii/rmii mux setup failed: %d\n", ret);
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return;
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}
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/* configure the CFGCHIP3 register for RMII or MII */
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__raw_writel(val, cfg_chip3_base);
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soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID;
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ret = da8xx_register_emac();
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if (ret)
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pr_warning("emac registration failed: %d\n", ret);
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}
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static struct davinci_pm_config da850_pm_pdata = {
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.sleepcount = 128,
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};
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static struct platform_device da850_pm_device = {
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.name = "pm-davinci",
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.dev = {
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.platform_data = &da850_pm_pdata,
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},
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.id = -1,
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};
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static void __init mityomapl138_init(void)
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{
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int ret;
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/* for now, no special EDMA channels are reserved */
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ret = da850_register_edma(NULL);
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if (ret)
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pr_warning("edma registration failed: %d\n", ret);
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ret = da8xx_register_watchdog();
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if (ret)
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pr_warning("watchdog registration failed: %d\n", ret);
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davinci_serial_init(&mityomapl138_uart_config);
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ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
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if (ret)
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pr_warning("i2c0 registration failed: %d\n", ret);
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ret = pmic_tps65023_init();
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if (ret)
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pr_warning("TPS65023 PMIC init failed: %d\n", ret);
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mityomapl138_setup_nand();
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mityomapl138_config_emac();
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ret = da8xx_register_rtc();
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if (ret)
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pr_warning("rtc setup failed: %d\n", ret);
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ret = da850_register_cpufreq("pll0_sysclk3");
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if (ret)
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pr_warning("cpufreq registration failed: %d\n", ret);
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ret = da8xx_register_cpuidle();
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if (ret)
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pr_warning("cpuidle registration failed: %d\n", ret);
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ret = da850_register_pm(&da850_pm_device);
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if (ret)
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pr_warning("da850_evm_init: suspend registration failed: %d\n",
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ret);
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}
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#ifdef CONFIG_SERIAL_8250_CONSOLE
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static int __init mityomapl138_console_init(void)
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{
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if (!machine_is_mityomapl138())
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return 0;
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return add_preferred_console("ttyS", 1, "115200");
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}
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console_initcall(mityomapl138_console_init);
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#endif
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static void __init mityomapl138_map_io(void)
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{
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da850_init();
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}
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MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
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.phys_io = IO_PHYS,
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.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
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.boot_params = (DA8XX_DDR_BASE + 0x100),
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.map_io = mityomapl138_map_io,
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.init_irq = cp_intc_init,
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.timer = &davinci_timer,
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.init_machine = mityomapl138_init,
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MACHINE_END
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