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The OCC is a device embedded on a POWER processor that collects and aggregates sensor data from the processor and system. The OCC can provide the raw sensor data as well as perform thermal and power management on the system. This driver provides a hwmon interface to the OCC from a service processor (e.g. a BMC). The driver supports both POWER8 and POWER9 OCCs. Communications with the POWER8 OCC are established over standard I2C bus. The driver communicates with the POWER9 OCC through the FSI-based OCC driver, which handles the lower-level communication details. This patch lays out the structure of the OCC hwmon driver. There are two platform drivers, one each for P8 and P9 OCCs. These are probed through the I2C tree and the FSI-based OCC driver, respectively. The patch also defines the first common structures and methods between the two OCC versions. Signed-off-by: Eddie James <eajames@linux.ibm.com> [groeck: Fix up SPDX license identifier] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
35 lines
626 B
C
35 lines
626 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef OCC_COMMON_H
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#define OCC_COMMON_H
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struct device;
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#define OCC_RESP_DATA_BYTES 4089
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/*
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* Same response format for all OCC versions.
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* Allocate the largest possible response.
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*/
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struct occ_response {
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u8 seq_no;
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u8 cmd_type;
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u8 return_status;
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__be16 data_length;
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u8 data[OCC_RESP_DATA_BYTES];
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__be16 checksum;
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} __packed;
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struct occ {
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struct device *bus_dev;
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struct occ_response resp;
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u8 poll_cmd_data; /* to perform OCC poll command */
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int (*send_cmd)(struct occ *occ, u8 *cmd);
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};
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int occ_setup(struct occ *occ, const char *name);
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#endif /* OCC_COMMON_H */
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