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4c811b99b4
This is a simple move of all header files that are no longer included by anything else from the include/mach directory to the platform directory itself as preparation for multiplatform support. The mach/uncompress.h headers are left in place for now, and are mildly modified to be independent of the other headers. They will be removed entirely when ARCH_MULTIPLATFORM gets enabled and they become obsolete. Rather than updating the path names inside of the comments of each header, I delete those comments to avoid having to update them again, should they get moved or copied another time. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
93 lines
2.3 KiB
C
93 lines
2.3 KiB
C
/*
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* IRQ definitions for Marvell MV78xx0 SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_IRQS_H
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#define __ASM_ARCH_IRQS_H
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/*
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* MV78xx0 Low Interrupt Controller
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*/
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#define IRQ_MV78XX0_ERR 0
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#define IRQ_MV78XX0_SPI 1
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#define IRQ_MV78XX0_I2C_0 2
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#define IRQ_MV78XX0_I2C_1 3
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#define IRQ_MV78XX0_IDMA_0 4
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#define IRQ_MV78XX0_IDMA_1 5
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#define IRQ_MV78XX0_IDMA_2 6
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#define IRQ_MV78XX0_IDMA_3 7
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#define IRQ_MV78XX0_TIMER_0 8
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#define IRQ_MV78XX0_TIMER_1 9
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#define IRQ_MV78XX0_TIMER_2 10
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#define IRQ_MV78XX0_TIMER_3 11
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#define IRQ_MV78XX0_UART_0 12
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#define IRQ_MV78XX0_UART_1 13
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#define IRQ_MV78XX0_UART_2 14
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#define IRQ_MV78XX0_UART_3 15
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#define IRQ_MV78XX0_USB_0 16
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#define IRQ_MV78XX0_USB_1 17
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#define IRQ_MV78XX0_USB_2 18
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#define IRQ_MV78XX0_CRYPTO 19
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#define IRQ_MV78XX0_SDIO_0 20
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#define IRQ_MV78XX0_SDIO_1 21
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#define IRQ_MV78XX0_XOR_0 22
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#define IRQ_MV78XX0_XOR_1 23
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#define IRQ_MV78XX0_I2S_0 24
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#define IRQ_MV78XX0_I2S_1 25
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#define IRQ_MV78XX0_SATA 26
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#define IRQ_MV78XX0_TDMI 27
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/*
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* MV78xx0 High Interrupt Controller
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*/
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#define IRQ_MV78XX0_PCIE_00 32
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#define IRQ_MV78XX0_PCIE_01 33
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#define IRQ_MV78XX0_PCIE_02 34
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#define IRQ_MV78XX0_PCIE_03 35
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#define IRQ_MV78XX0_PCIE_10 36
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#define IRQ_MV78XX0_PCIE_11 37
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#define IRQ_MV78XX0_PCIE_12 38
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#define IRQ_MV78XX0_PCIE_13 39
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#define IRQ_MV78XX0_GE00_SUM 40
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#define IRQ_MV78XX0_GE00_RX 41
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#define IRQ_MV78XX0_GE00_TX 42
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#define IRQ_MV78XX0_GE00_MISC 43
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#define IRQ_MV78XX0_GE01_SUM 44
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#define IRQ_MV78XX0_GE01_RX 45
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#define IRQ_MV78XX0_GE01_TX 46
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#define IRQ_MV78XX0_GE01_MISC 47
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#define IRQ_MV78XX0_GE10_SUM 48
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#define IRQ_MV78XX0_GE10_RX 49
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#define IRQ_MV78XX0_GE10_TX 50
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#define IRQ_MV78XX0_GE10_MISC 51
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#define IRQ_MV78XX0_GE11_SUM 52
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#define IRQ_MV78XX0_GE11_RX 53
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#define IRQ_MV78XX0_GE11_TX 54
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#define IRQ_MV78XX0_GE11_MISC 55
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#define IRQ_MV78XX0_GPIO_0_7 56
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#define IRQ_MV78XX0_GPIO_8_15 57
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#define IRQ_MV78XX0_GPIO_16_23 58
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#define IRQ_MV78XX0_GPIO_24_31 59
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#define IRQ_MV78XX0_DB_IN 60
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#define IRQ_MV78XX0_DB_OUT 61
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/*
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* MV78xx0 Error Interrupt Controller
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*/
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#define IRQ_MV78XX0_GE_ERR 70
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/*
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* MV78XX0 General Purpose Pins
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*/
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#define IRQ_MV78XX0_GPIO_START 96
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#define NR_GPIO_IRQS 32
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#define MV78XX0_NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
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#endif
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