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86f9abb6ec
UART2 is used to connect the processor with the bluetooth chip, these pins are not common between IGEPv2 boards and IGEP COM MODULE boards. This patch muxes the correct pins for every board and removes UART2 configuration from common omap3-igep.dtsi file. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
296 lines
7.9 KiB
Plaintext
296 lines
7.9 KiB
Plaintext
/*
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* Device Tree Source for IGEPv2 Rev. (TI OMAP AM/DM37x)
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*
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* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
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* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "omap3-igep.dtsi"
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#include "omap-gpmc-smsc9221.dtsi"
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/ {
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model = "IGEPv2 (TI OMAP AM/DM37x)";
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compatible = "isee,omap3-igep0020", "ti,omap36xx", "ti,omap3";
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins>;
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compatible = "gpio-leds";
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boot {
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label = "omap3:green:boot";
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gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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user0 {
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label = "omap3:red:user0";
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gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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user1 {
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label = "omap3:red:user1";
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gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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user2 {
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label = "omap3:green:user1";
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gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
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};
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};
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/* HS USB Port 1 Power */
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hsusb1_power: hsusb1_power_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb1_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
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startup-delay-us = <70000>;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb1_phy: hsusb1_phy {
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
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vcc-supply = <&hsusb1_power>;
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};
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tfp410: encoder@0 {
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compatible = "ti,tfp410";
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powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint@0 {
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remote-endpoint = <&dpi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint@0 {
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remote-endpoint = <&dvi_connector_in>;
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};
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};
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};
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};
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dvi0: connector@0 {
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compatible = "dvi-connector";
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label = "dvi";
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digital;
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ddc-i2c-bus = <&i2c3>;
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port {
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dvi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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};
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&omap3_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <
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&tfp410_pins
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&dss_dpi_pins
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>;
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tfp410_pins: pinmux_tfp410_pins {
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pinctrl-single,pins = <
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0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
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>;
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};
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dss_dpi_pins: pinmux_dss_dpi_pins {
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pinctrl-single,pins = <
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0x0a4 (PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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0x0a6 (PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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0x0a8 (PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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0x0aa (PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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0x0ac (PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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0x0ae (PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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0x0b0 (PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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0x0b2 (PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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0x0b4 (PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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0x0b6 (PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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0x0b8 (PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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0x0ba (PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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0x0bc (PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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0x0be (PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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0x0c0 (PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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0x0c2 (PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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0x0c4 (PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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0x0c6 (PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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0x0c8 (PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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0x0ca (PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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0x0cc (PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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0x0ce (PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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0x0d0 (PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
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0x0d2 (PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
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0x0d4 (PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
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0x0d6 (PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
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0x0d8 (PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
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0x0da (PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
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OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
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OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
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>;
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};
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};
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&omap3_pmx_core2 {
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusbb1_pins
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>;
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hsusbb1_pins: pinmux_hsusbb1_pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
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OMAP3630_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
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OMAP3630_CORE2_IOPAD(0x25ec, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
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OMAP3630_CORE2_IOPAD(0x25ee, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
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OMAP3630_CORE2_IOPAD(0x25dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
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OMAP3630_CORE2_IOPAD(0x25de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
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OMAP3630_CORE2_IOPAD(0x25e0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
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OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
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OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
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OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
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OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
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OMAP3630_CORE2_IOPAD(0x25ea, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
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>;
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};
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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OMAP3630_CORE2_IOPAD(0x25f4, PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
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OMAP3630_CORE2_IOPAD(0x25f6, PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
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OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
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>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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/*
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* Display monitor features are burnt in the EEPROM
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* as EDID data.
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*/
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eeprom@50 {
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compatible = "ti,eeprom";
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reg = <0x50>;
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};
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};
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&gpmc {
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ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
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<5 0 0x2c000000 0x01000000>;
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nand@0,0 {
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linux,mtd-name= "micron,mt29c4g96maz";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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nand-bus-width = <16>;
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gpmc,device-width = <2>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "SPL";
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reg = <0 0x100000>;
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};
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partition@80000 {
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label = "U-Boot";
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reg = <0x100000 0x180000>;
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};
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partition@1c0000 {
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label = "Environment";
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reg = <0x280000 0x100000>;
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};
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partition@280000 {
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label = "Kernel";
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reg = <0x380000 0x300000>;
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};
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partition@780000 {
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label = "Filesystem";
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reg = <0x680000 0x1f980000>;
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};
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};
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ethernet@gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&smsc9221_pins>;
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reg = <5 0 0xff>;
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interrupt-parent = <&gpio6>;
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interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&usbhshost {
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port1-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <&hsusb1_phy>;
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};
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&vpll2 {
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/* Needed for DSS */
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regulator-name = "vdds_dsi";
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};
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&dss {
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status = "ok";
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port {
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dpi_out: endpoint {
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remote-endpoint = <&tfp410_in>;
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data-lines = <24>;
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};
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};
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};
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