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https://github.com/edk2-porting/linux-next.git
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65b935aa99
This patch adds the config infrastructure, the pinmux and basic board setup code for PAZ00 (name of board inside the AC100/AZ). Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Olof Johansson <olof@lixom.net>
129 lines
3.1 KiB
C
129 lines
3.1 KiB
C
/*
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* arch/arm/mach-tegra/board-paz00.c
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*
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* Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
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*
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* Based on board-harmony.c
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* Copyright (C) 2010 Google, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/pda_power.h>
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#include <linux/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/setup.h>
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#include <mach/iomap.h>
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#include <mach/irqs.h>
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#include <mach/sdhci.h>
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#include "board.h"
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#include "board-paz00.h"
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#include "clock.h"
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#include "devices.h"
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#include "gpio-names.h"
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static struct plat_serial8250_port debug_uart_platform_data[] = {
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{
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.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
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.mapbase = TEGRA_UARTD_BASE,
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.irq = INT_UARTD,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = 216000000,
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}, {
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.flags = 0
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}
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};
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static struct platform_device debug_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = debug_uart_platform_data,
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},
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};
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static struct platform_device *paz00_devices[] __initdata = {
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&debug_uart,
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&tegra_sdhci_device1,
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&tegra_sdhci_device2,
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&tegra_sdhci_device4,
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};
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static void __init tegra_paz00_fixup(struct machine_desc *desc,
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struct tag *tags, char **cmdline, struct meminfo *mi)
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{
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mi->nr_banks = 1;
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mi->bank[0].start = PHYS_OFFSET;
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mi->bank[0].size = 448 * SZ_1M;
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}
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static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
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/* name parent rate enabled */
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{ "uartd", "pll_p", 216000000, true },
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{ NULL, NULL, 0, 0},
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};
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static struct tegra_sdhci_platform_data sdhci_pdata1 = {
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.cd_gpio = TEGRA_GPIO_SD1_CD,
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.wp_gpio = TEGRA_GPIO_SD1_WP,
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.power_gpio = TEGRA_GPIO_SD1_POWER,
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};
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static struct tegra_sdhci_platform_data sdhci_pdata2 = {
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.cd_gpio = -1,
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.wp_gpio = -1,
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.power_gpio = -1,
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};
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static struct tegra_sdhci_platform_data sdhci_pdata4 = {
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.cd_gpio = TEGRA_GPIO_SD4_CD,
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.wp_gpio = TEGRA_GPIO_SD4_WP,
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.power_gpio = TEGRA_GPIO_SD4_POWER,
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.is_8bit = 1,
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};
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static void __init tegra_paz00_init(void)
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{
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tegra_clk_init_from_table(paz00_clk_init_table);
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paz00_pinmux_init();
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tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
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tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
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tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
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platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
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}
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MACHINE_START(PAZ00, "paz00")
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.boot_params = 0x00000100,
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.fixup = tegra_paz00_fixup,
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.map_io = tegra_map_common_io,
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.init_early = tegra_init_early,
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.init_irq = tegra_init_irq,
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.timer = &tegra_timer,
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.init_machine = tegra_paz00_init,
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MACHINE_END
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