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df70aeef60
Add a new type of clocks that can be provided to a peripheral. In addition to the peripheral clock, this new clock that can use several input clocks as parents can generate divided rates. This would allow a peripheral to have finer grained clocks for generating a baud rate, clocking an asynchronous part or having more options in frequency. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [sboyd@codeaurora.org: Transition to new clk_hw provider APIs] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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| .. | ||
| clk-generated.c | ||
| clk-h32mx.c | ||
| clk-main.c | ||
| clk-master.c | ||
| clk-peripheral.c | ||
| clk-pll.c | ||
| clk-plldiv.c | ||
| clk-programmable.c | ||
| clk-slow.c | ||
| clk-smd.c | ||
| clk-system.c | ||
| clk-usb.c | ||
| clk-utmi.c | ||
| Makefile | ||
| pmc.c | ||
| pmc.h | ||
| sckc.c | ||
| sckc.h | ||