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4c7c997886
This fixes up a typo in the ll/sc based cmpxchg code which apparently wasn't getting a lot of testing due to the swapped old/new pair. With that fixed up, the ll/sc code also starts using it and provides its own atomic_add_unless(). Signed-off-by: Aoi Shinkai <shinkoi2005@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
72 lines
1.4 KiB
C
72 lines
1.4 KiB
C
#ifndef __ASM_SH_CMPXCHG_LLSC_H
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#define __ASM_SH_CMPXCHG_LLSC_H
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static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
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{
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unsigned long retval;
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! xchg_u32 \n\t"
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"mov %0, %1 \n\t"
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"mov %3, %0 \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"synco \n\t"
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: "=&z"(tmp), "=&r" (retval)
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: "r" (m), "r" (val)
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: "t", "memory"
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);
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return retval;
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}
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static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
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{
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unsigned long retval;
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! xchg_u8 \n\t"
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"mov %0, %1 \n\t"
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"mov %3, %0 \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"synco \n\t"
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: "=&z"(tmp), "=&r" (retval)
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: "r" (m), "r" (val & 0xff)
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: "t", "memory"
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);
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return retval;
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}
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static inline unsigned long
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__cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
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{
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unsigned long retval;
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: \n\t"
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"movli.l @%2, %0 ! __cmpxchg_u32 \n\t"
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"mov %0, %1 \n\t"
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"cmp/eq %1, %3 \n\t"
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"bf 2f \n\t"
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"mov %4, %0 \n\t"
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"2: \n\t"
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"movco.l %0, @%2 \n\t"
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"bf 1b \n\t"
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"synco \n\t"
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: "=&z" (tmp), "=&r" (retval)
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: "r" (m), "r" (old), "r" (new)
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: "t", "memory"
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);
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return retval;
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}
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#endif /* __ASM_SH_CMPXCHG_LLSC_H */
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