mirror of
https://github.com/edk2-porting/linux-next.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
123 lines
2.7 KiB
C
123 lines
2.7 KiB
C
/*
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* Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx>
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* Copyright (C) 2004 Intel Corp.
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*
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* This code is released under the GNU General Public License version 2.
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*/
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/*
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* mmconfig.c - Low-level direct PCI config space access via MMCONFIG
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include "pci.h"
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/* The physical address of the MMCONFIG aperture. Set from ACPI tables. */
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u32 pci_mmcfg_base_addr;
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#define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
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/* The base address of the last MMCONFIG device accessed */
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static u32 mmcfg_last_accessed_device;
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/*
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* Functions for accessing PCI configuration space with MMCONFIG accesses
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*/
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static inline void pci_exp_set_dev_base(int bus, int devfn)
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{
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u32 dev_base = pci_mmcfg_base_addr | (bus << 20) | (devfn << 12);
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if (dev_base != mmcfg_last_accessed_device) {
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mmcfg_last_accessed_device = dev_base;
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set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
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}
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}
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static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 *value)
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{
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unsigned long flags;
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if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
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return -EINVAL;
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spin_lock_irqsave(&pci_config_lock, flags);
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pci_exp_set_dev_base(bus, devfn);
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switch (len) {
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case 1:
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*value = readb(mmcfg_virt_addr + reg);
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break;
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case 2:
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*value = readw(mmcfg_virt_addr + reg);
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break;
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case 4:
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*value = readl(mmcfg_virt_addr + reg);
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break;
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}
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spin_unlock_irqrestore(&pci_config_lock, flags);
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return 0;
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}
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static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
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unsigned int devfn, int reg, int len, u32 value)
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{
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unsigned long flags;
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if ((bus > 255) || (devfn > 255) || (reg > 4095))
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return -EINVAL;
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spin_lock_irqsave(&pci_config_lock, flags);
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pci_exp_set_dev_base(bus, devfn);
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switch (len) {
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case 1:
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writeb(value, mmcfg_virt_addr + reg);
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break;
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case 2:
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writew(value, mmcfg_virt_addr + reg);
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break;
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case 4:
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writel(value, mmcfg_virt_addr + reg);
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break;
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}
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spin_unlock_irqrestore(&pci_config_lock, flags);
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return 0;
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}
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static struct pci_raw_ops pci_mmcfg = {
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.read = pci_mmcfg_read,
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.write = pci_mmcfg_write,
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};
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static int __init pci_mmcfg_init(void)
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{
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if ((pci_probe & PCI_PROBE_MMCONF) == 0)
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goto out;
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if (!pci_mmcfg_base_addr)
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goto out;
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/* Kludge for now. Don't use mmconfig on AMD systems because
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those have some busses where mmconfig doesn't work,
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and we don't parse ACPI MCFG well enough to handle that.
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Remove when proper handling is added. */
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if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
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goto out;
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printk(KERN_INFO "PCI: Using MMCONFIG\n");
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raw_pci_ops = &pci_mmcfg;
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pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
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out:
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return 0;
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}
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arch_initcall(pci_mmcfg_init);
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