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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-23 20:53:53 +08:00
linux-next/drivers/clk/socfpga
Mike Turquette a854aea24c Adds support getting the divider registers for the MAIN PLL that was once
thought to be hidden.
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Merge tag 'socfpga-clk-update-for-v3.16' of git://git.rocketboards.org/linux-socfpga-next into clk-next-socfpga

Adds support getting the divider registers for the MAIN PLL that was once
thought to be hidden.
2014-05-12 19:11:13 -07:00
..
clk-gate.c clk: socfpga: add divider registers to the main pll outputs 2014-05-12 12:27:22 -05:00
clk-periph.c clk: socfpga: add divider registers to the main pll outputs 2014-05-12 12:27:22 -05:00
clk-pll.c clk: socfpga: fix clock driver for 3.15 2014-04-30 11:44:01 -07:00
clk.c clk: socfpga: fix clock driver for 3.15 2014-04-30 11:44:01 -07:00
clk.h clk: socfpga: add divider registers to the main pll outputs 2014-05-12 12:27:22 -05:00
Makefile clk: socfpga: split clk code 2014-02-18 14:08:13 -08:00