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96a388de5d
Move the headers to include/asm-x86 and fixup the header install make rules Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
350 lines
10 KiB
C
350 lines
10 KiB
C
#ifndef _ASM_IO_H
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#define _ASM_IO_H
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#include <linux/string.h>
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#include <linux/compiler.h>
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*
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* This file is not meant to be obfuscating: it's just complicated
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* to (a) handle it all in a way that makes gcc able to optimize it
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* as well as possible and (b) trying to avoid writing the same thing
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* over and over again with slight variations and possibly making a
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* mistake somewhere.
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*/
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/*
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* Thanks to James van Artsdalen for a better timing-fix than
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* the two short jumps: using outb's to a nonexistent port seems
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* to guarantee better timings even on fast machines.
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*
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* On the other hand, I'd like to be sure of a non-existent port:
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* I feel a bit unsafe about using 0x80 (should be safe, though)
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*
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* Linus
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*/
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/*
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* Bit simplified and optimized by Jan Hubicka
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* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
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*
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* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
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* isa_read[wl] and isa_write[wl] fixed
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* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
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*/
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#define IO_SPACE_LIMIT 0xffff
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#define XQUAD_PORTIO_BASE 0xfe400000
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#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
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#ifdef __KERNEL__
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#include <asm-generic/iomap.h>
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#include <linux/vmalloc.h>
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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/**
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* virt_to_phys - map virtual addresses to physical
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* @address: address to remap
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*
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* The returned physical address is the physical (CPU) mapping for
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* the memory address given. It is only valid to use this function on
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* addresses directly mapped or allocated via kmalloc.
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*
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* This function does not give bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline unsigned long virt_to_phys(volatile void * address)
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{
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return __pa(address);
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}
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/**
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* phys_to_virt - map physical address to virtual
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* @address: address to remap
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*
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* The returned virtual address is a current CPU mapping for
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* the memory address given. It is only valid to use this function on
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* addresses that have a kernel mapping
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*
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* This function does not handle bus mappings for DMA transfers. In
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* almost all conceivable cases a device driver should not be using
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* this function
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*/
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static inline void * phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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/*
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* Change "struct page" to physical address.
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*/
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#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
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extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
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/**
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* ioremap - map bus memory into CPU space
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* @offset: bus address of the memory
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* @size: size of the resource to map
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*
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* ioremap performs a platform specific sequence of operations to
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* make bus memory CPU accessible via the readb/readw/readl/writeb/
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* writew/writel functions and the other mmio helpers. The returned
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* address is not guaranteed to be usable directly as a virtual
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* address.
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*
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* If the area you are trying to map is a PCI BAR you should have a
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* look at pci_iomap().
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*/
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static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
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{
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return __ioremap(offset, size, 0);
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}
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extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
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extern void iounmap(volatile void __iomem *addr);
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/*
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* bt_ioremap() and bt_iounmap() are for temporary early boot-time
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* mappings, before the real ioremap() is functional.
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* A boot-time mapping is currently limited to at most 16 pages.
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*/
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extern void *bt_ioremap(unsigned long offset, unsigned long size);
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extern void bt_iounmap(void *addr, unsigned long size);
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extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
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/* Use early IO mappings for DMI because it's initialized early */
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#define dmi_ioremap bt_ioremap
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#define dmi_iounmap bt_iounmap
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#define dmi_alloc alloc_bootmem
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/*
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* ISA I/O bus memory addresses are 1:1 with the physical address.
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*/
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#define isa_virt_to_bus virt_to_phys
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#define isa_page_to_bus page_to_phys
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#define isa_bus_to_virt phys_to_virt
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/*
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* However PCI ones are not necessarily 1:1 and therefore these interfaces
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* are forbidden in portable PCI drivers.
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*
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* Allow them on x86 for legacy drivers, though.
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*/
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the x86 architecture, we just read/write the
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* memory location directly.
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*/
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static inline unsigned char readb(const volatile void __iomem *addr)
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{
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return *(volatile unsigned char __force *) addr;
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}
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static inline unsigned short readw(const volatile void __iomem *addr)
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{
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return *(volatile unsigned short __force *) addr;
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}
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static inline unsigned int readl(const volatile void __iomem *addr)
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{
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return *(volatile unsigned int __force *) addr;
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}
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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static inline void writeb(unsigned char b, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *) addr = b;
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}
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static inline void writew(unsigned short b, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *) addr = b;
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}
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static inline void writel(unsigned int b, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *) addr = b;
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}
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define mmiowb()
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static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
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{
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memset((void __force *) addr, val, count);
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}
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static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
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{
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__memcpy(dst, (void __force *) src, count);
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}
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static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
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{
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__memcpy((void __force *) dst, src, count);
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}
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/*
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* ISA space is 'always mapped' on a typical x86 system, no need to
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* explicitly ioremap() it. The fact that the ISA IO space is mapped
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* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
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* are physical addresses. The following constant pointer can be
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* used as the IO-area pointer (it can be iounmapped as well, so the
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* analogy with PCI is quite large):
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*/
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#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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/*
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* Cache management
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*
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* This needed for two cases
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* 1. Out of order aware processors
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* 2. Accidentally out of order processors (PPro errata #51)
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*/
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#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
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static inline void flush_write_buffers(void)
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{
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__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
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}
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#define dma_cache_inv(_start,_size) flush_write_buffers()
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#define dma_cache_wback(_start,_size) flush_write_buffers()
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#define dma_cache_wback_inv(_start,_size) flush_write_buffers()
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#else
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/* Nothing to do */
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#define dma_cache_inv(_start,_size) do { } while (0)
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#define dma_cache_wback(_start,_size) do { } while (0)
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#define dma_cache_wback_inv(_start,_size) do { } while (0)
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#define flush_write_buffers()
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#endif
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#endif /* __KERNEL__ */
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static inline void native_io_delay(void)
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{
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asm volatile("outb %%al,$0x80" : : : "memory");
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}
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#if defined(CONFIG_PARAVIRT)
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#include <asm/paravirt.h>
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#else
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static inline void slow_down_io(void) {
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native_io_delay();
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#ifdef REALLY_SLOW_IO
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native_io_delay();
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native_io_delay();
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native_io_delay();
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#endif
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}
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#endif
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#ifdef CONFIG_X86_NUMAQ
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extern void *xquad_portio; /* Where the IO area was mapped */
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#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
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#define __BUILDIO(bwl,bw,type) \
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static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
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if (xquad_portio) \
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write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
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else \
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out##bwl##_local(value, port); \
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} \
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static inline void out##bwl(unsigned type value, int port) { \
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out##bwl##_quad(value, port, 0); \
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} \
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static inline unsigned type in##bwl##_quad(int port, int quad) { \
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if (xquad_portio) \
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return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
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else \
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return in##bwl##_local(port); \
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} \
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static inline unsigned type in##bwl(int port) { \
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return in##bwl##_quad(port, 0); \
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}
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#else
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#define __BUILDIO(bwl,bw,type) \
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static inline void out##bwl(unsigned type value, int port) { \
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out##bwl##_local(value, port); \
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} \
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static inline unsigned type in##bwl(int port) { \
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return in##bwl##_local(port); \
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}
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#endif
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#define BUILDIO(bwl,bw,type) \
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static inline void out##bwl##_local(unsigned type value, int port) { \
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__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
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} \
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static inline unsigned type in##bwl##_local(int port) { \
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unsigned type value; \
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__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
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return value; \
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} \
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static inline void out##bwl##_local_p(unsigned type value, int port) { \
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out##bwl##_local(value, port); \
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slow_down_io(); \
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} \
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static inline unsigned type in##bwl##_local_p(int port) { \
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unsigned type value = in##bwl##_local(port); \
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slow_down_io(); \
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return value; \
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} \
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__BUILDIO(bwl,bw,type) \
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static inline void out##bwl##_p(unsigned type value, int port) { \
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out##bwl(value, port); \
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slow_down_io(); \
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} \
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static inline unsigned type in##bwl##_p(int port) { \
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unsigned type value = in##bwl(port); \
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slow_down_io(); \
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return value; \
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} \
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static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
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__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
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} \
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static inline void ins##bwl(int port, void *addr, unsigned long count) { \
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__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
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}
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BUILDIO(b,b,char)
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BUILDIO(w,w,short)
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BUILDIO(l,,int)
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#endif
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