mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 14:43:58 +08:00
70db8a6273
Enable hardware gate control for all dpll MX and X2 postdividers. This requires the allow_idle/deny_idle functions to be populated for all clock nodes (mx/x2 post dividers) in clkops. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
85 lines
1.8 KiB
C
85 lines
1.8 KiB
C
/*
|
|
* OMAP4-specific DPLL control functions
|
|
*
|
|
* Copyright (C) 2011 Texas Instruments, Inc.
|
|
* Rajendra Nayak
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <linux/kernel.h>
|
|
#include <linux/errno.h>
|
|
#include <linux/clk.h>
|
|
#include <linux/io.h>
|
|
#include <linux/bitops.h>
|
|
|
|
#include <plat/cpu.h>
|
|
#include <plat/clock.h>
|
|
|
|
#include "clock.h"
|
|
#include "cm-regbits-44xx.h"
|
|
|
|
/* Supported only on OMAP4 */
|
|
int omap4_dpllmx_gatectrl_read(struct clk *clk)
|
|
{
|
|
u32 v;
|
|
u32 mask;
|
|
|
|
if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
|
|
return -EINVAL;
|
|
|
|
mask = clk->flags & CLOCK_CLKOUTX2 ?
|
|
OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
|
|
OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
|
|
|
|
v = __raw_readl(clk->clksel_reg);
|
|
v &= mask;
|
|
v >>= __ffs(mask);
|
|
|
|
return v;
|
|
}
|
|
|
|
void omap4_dpllmx_allow_gatectrl(struct clk *clk)
|
|
{
|
|
u32 v;
|
|
u32 mask;
|
|
|
|
if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
|
|
return;
|
|
|
|
mask = clk->flags & CLOCK_CLKOUTX2 ?
|
|
OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
|
|
OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
|
|
|
|
v = __raw_readl(clk->clksel_reg);
|
|
/* Clear the bit to allow gatectrl */
|
|
v &= ~mask;
|
|
__raw_writel(v, clk->clksel_reg);
|
|
}
|
|
|
|
void omap4_dpllmx_deny_gatectrl(struct clk *clk)
|
|
{
|
|
u32 v;
|
|
u32 mask;
|
|
|
|
if (!clk || !clk->clksel_reg || !cpu_is_omap44xx())
|
|
return;
|
|
|
|
mask = clk->flags & CLOCK_CLKOUTX2 ?
|
|
OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK :
|
|
OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK;
|
|
|
|
v = __raw_readl(clk->clksel_reg);
|
|
/* Set the bit to deny gatectrl */
|
|
v |= mask;
|
|
__raw_writel(v, clk->clksel_reg);
|
|
}
|
|
|
|
const struct clkops clkops_omap4_dpllmx_ops = {
|
|
.allow_idle = omap4_dpllmx_allow_gatectrl,
|
|
.deny_idle = omap4_dpllmx_deny_gatectrl,
|
|
};
|
|
|