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474 lines
15 KiB
C
474 lines
15 KiB
C
/*
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* i82596 ethernet controller bits and structures (little endian)
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*
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* $Id: i82596.h,v 1.8 1996/09/03 11:19:03 rick Exp $
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*/
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/************************************************************************/
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/* */
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/* PORT commands (p. 4-20). The least significant nibble is one */
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/* of these commands, the rest of the command is a memory address */
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/* aligned on a 16 byte boundary. Note that port commands must */
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/* be written to the PORT address and the PORT address+2 with two */
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/* halfword writes. Write the LSH first to PORT, then the MSH to */
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/* PORT+2. Blame Intel. */
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/* */
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/************************************************************************/
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#define I596_PORT_RESET 0x0 /* Reset. Wait 5 SysClks & 10 TxClks */
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#define I596_PORT_SELFTEST 0x1 /* Do a selftest */
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#define I596_PORT_SCP_ADDR 0x2 /* Set new SCP address */
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#define I596_PORT_DUMP 0x3 /* Dump internal data structures */
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/*
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* I596_ST: Selftest results (p. 4-21)
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*/
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typedef volatile struct
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{
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ulong signature; /* ROM checksum */
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ulong result; /* Selftest results: non-zero is a failure */
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} I596_ST;
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#define I596_ST_SELFTEST_FAIL 0x1000 /* Selftest Failed */
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#define I596_ST_DIAGNOSE_FAIL 0x0020 /* Diagnose Failed */
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#define I596_ST_BUSTIMER_FAIL 0x0010 /* Bus Timer Failed */
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#define I596_ST_REGISTER_FAIL 0x0008 /* Register Failed */
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#define I596_ST_ROM_FAIL 0x0004 /* ROM Failed */
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/*
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* I596_DUMP: Dump results
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*/
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typedef volatile struct
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{
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ulong dump[77];
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} I596_DUMP;
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/************************************************************************/
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/* */
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/* I596_TBD: Transmit Buffer Descriptor (p. 4-59) */
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/* */
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/************************************************************************/
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typedef volatile struct _I596_TBD
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{
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ulong count;
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vol struct _I596_TBD *next;
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uchar *buf;
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ushort unused1;
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ushort unused2;
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} I596_TBD;
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#define I596_TBD_NOLINK ((I596_TBD *) 0xffffffff)
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#define I596_TBD_EOF 0x8000
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#define I596_TBD_COUNT_MASK 0x3fff
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/************************************************************************/
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/* */
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/* I596_TFD: Transmit Frame Descriptor (p. 4-56) */
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/* a.k.a. I596_CB_XMIT */
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/* */
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/************************************************************************/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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I596_TBD *tbdp;
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ulong count; /* for speed */
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/* Application defined data follows structure... */
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#if 0 /* We don't use these intel defined ones */
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uchar addr[6];
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ushort len;
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uchar data[1];
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#else
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ulong dstchan;/* Used by multi-NIC mode */
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#endif
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} I596_TFD;
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#define I596_TFD_NOCRC 0x0010 /* cmd: No CRC insertion */
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#define I596_TFD_FLEX 0x0008 /* cmd: Flexible mode */
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/************************************************************************/
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/* */
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/* I596_RBD: Receive Buffer Descriptor (p. 4-84) */
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/* */
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/************************************************************************/
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typedef volatile struct _I596_RBD
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{
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#ifdef INTEL_RETENTIVE
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ushort count; /* Length of data in buf */
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ushort offset;
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#else
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ulong count; /* Length of data in buf */
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#endif
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vol struct _I596_RBD *next; /* Next buffer descriptor in list */
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uchar *buf; /* Data buffer */
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#ifdef INTEL_RETENTIVE
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ushort size; /* Size of buf (constant) */
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ushort zero;
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#else
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ulong size; /* Size of buf (constant) */
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#endif
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/* Application defined data follows structure... */
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uchar chan;
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uchar refcnt;
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ushort len;
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} I596_RBD;
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#define I596_RBD_NOLINK ((I596_RBD *) 0xffffffff)
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#define I596_RBD_EOF 0x8000 /* This is last buffer in a frame */
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#define I596_RBD_F 0x4000 /* The actual count is valid */
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#define I596_RBD_EL 0x8000 /* Last buffer in list */
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/************************************************************************/
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/* */
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/* I596_RFD: Receive Frame Descriptor (p. 4-79) */
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/* */
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/************************************************************************/
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typedef volatile struct _I596_RFD
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{
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ushort status;
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ushort cmd;
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vol struct _I596_RFD *next;
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vol struct _I596_RBD *rbdp;
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ushort count; /* Len of data in RFD: always 0 */
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ushort size; /* Size of RFD buffer: always 0 */
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/* Application defined data follows structure... */
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# if 0 /* We don't use these intel defined ones */
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uchar addr[6];
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ushort len;
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uchar data[1];
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# else
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ulong dstchan;/* Used by multi-nic mode */
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# endif
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} I596_RFD;
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#define I596_RFD_C 0x8000 /* status: frame complete */
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#define I596_RFD_B 0x4000 /* status: frame busy or waiting */
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#define I596_RFD_OK 0x2000 /* status: frame OK */
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#define I596_RFD_ERR_LENGTH 0x1000 /* status: length error */
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#define I596_RFD_ERR_CRC 0x0800 /* status: CRC error */
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#define I596_RFD_ERR_ALIGN 0x0400 /* status: alignment error */
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#define I596_RFD_ERR_NOBUFS 0x0200 /* status: resource error */
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#define I596_RFD_ERR_DMA 0x0100 /* status: DMA error */
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#define I596_RFD_ERR_SHORT 0x0080 /* status: too short error */
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#define I596_RFD_NOMATCH 0x0002 /* status: IA was not matched */
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#define I596_RFD_COLLISION 0x0001 /* status: collision during receive */
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#define I596_RFD_EL 0x8000 /* cmd: end of RFD list */
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#define I596_RFD_FLEX 0x0008 /* cmd: Flexible mode */
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#define I596_RFD_EOF 0x8000 /* count: last buffer in the frame */
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#define I596_RFD_F 0x4000 /* count: The actual count is valid */
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/************************************************************************/
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/* */
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/* Commands */
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/* */
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/************************************************************************/
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/* values for cmd halfword in all the structs below */
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#define I596_CB_CMD 0x07 /* CB COMMANDS */
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#define I596_CB_CMD_NOP 0
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#define I596_CB_CMD_IA 1
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#define I596_CB_CMD_CONF 2
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#define I596_CB_CMD_MCAST 3
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#define I596_CB_CMD_XMIT 4
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#define I596_CB_CMD_TDR 5
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#define I596_CB_CMD_DUMP 6
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#define I596_CB_CMD_DIAG 7
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#define I596_CB_CMD_EL 0x8000 /* CB is last in linked list */
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#define I596_CB_CMD_S 0x4000 /* Suspend after execution */
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#define I596_CB_CMD_I 0x2000 /* cause interrupt */
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/* values for the status halfword in all the struct below */
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#define I596_CB_STATUS 0xF000 /* All four status bits */
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#define I596_CB_STATUS_C 0x8000 /* Command complete */
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#define I596_CB_STATUS_B 0x4000 /* Command busy executing */
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#define I596_CB_STATUS_C_OR_B 0xC000 /* Command complete or busy */
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#define I596_CB_STATUS_OK 0x2000 /* Command complete, no errors */
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#define I596_CB_STATUS_A 0x1000 /* Command busy executing */
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#define I596_CB_NOLINK ((I596_CB *) 0xffffffff)
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/*
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* I596_CB_NOP: NOP Command (p. 4-34)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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} I596_CB_NOP;
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/*
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* Same as above, but command and status in one ulong for speed
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*/
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typedef volatile struct
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{
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ulong csr;
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union _I596_CB *next;
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} I596_CB_FAST;
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#define FASTs(X) (X)
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#define FASTc(X) ((X)<<16)
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/*
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* I596_CB_IA: Individual (MAC) Address Command (p. 4-35)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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uchar addr[6];
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} I596_CB_IA;
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/*
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* I596_CB_CONF: Configure Command (p. 4-37)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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uchar conf[14];
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} I596_CB_CONF;
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#define I596_CONF0_P 0x80 /* Enable RBD Prefetch Bit */
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#define I596_CONF0_COUNT 14 /* Count of configuration bytes */
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#define I596_CONF1_MON_OFF 0xC0 /* Monitor mode: Monitor off */
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#define I596_CONF1_MON_ON 0x80 /* Monitor mode: Monitor on */
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#define I596_CONF1_TxFIFO(W) (W) /* TxFIFO trigger, in words */
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#define I596_CONF2_SAVEBF 0x80 /* Save bad frames */
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#define I596_CONF3_ADDRLEN(B) (B) /* Address length */
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#define I596_CONF3_NOSRCINSERT 0x08 /* Do not insert source address */
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#define I596_CONF3_PREAMBLE8 0x20 /* 8 byte preamble */
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#define I596_CONF3_LOOPOFF 0x00 /* Loopback: Off */
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#define I596_CONF3_LOOPINT 0x40 /* Loopback: internal */
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#define I596_CONF3_LOOPEXT 0xC0 /* Loopback: external */
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#define I596_CONF4_LINPRI(ST) (ST) /* Linear priority: slot times */
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#define I596_CONF4_EXPPRI(ST) (ST) /* Exponential priority: slot times */
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#define I596_CONF4_IEEE_BOM 0 /* IEEE 802.3 backoff method */
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#define I596_CONF5_IFS(X) (X) /* Interframe spacing in clocks */
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#define I596_CONF6_ST_LOW(X) (X&255) /* Slot time, low byte */
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#define I596_CONF7_ST_HI(X) (X>>8) /* Slot time, high bits */
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#define I596_CONF7_RETRY(X) (X<<4) /* Max retry number */
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#define I596_CONF8_PROMISC 0x01 /* Rcv all frames */
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#define I596_CONF8_NOBROAD 0x02
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#define I596_CONF8_MANCHESTER 0x04
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#define I596_CONF8_TxNOCRS 0x08
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#define I596_CONF8_NOCRC 0x10
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#define I596_CONF8_CRC_CCITT 0x20
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#define I596_CONF8_BITSTUFFING 0x40
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#define I596_CONF8_PADDING 0x80
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#define I596_CONF9_CSFILTER(X) (X)
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#define I596_CONF9_CSINT(X) 0x08
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#define I596_CONF9_CDFILTER(X) (X<<4)
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#define I596_CONF9_CDINT(X) 0x80
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#define I596_CONF10_MINLEN(X) (X) /* Minimum frame length */
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#define I596_CONF11_PRECRS_ 0x01 /* Preamble before carrier sense */
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#define I596_CONF11_LNGFLD_ 0x02 /* Padding in End of Carrier */
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#define I596_CONF11_CRCINM_ 0x04 /* CRC in memory */
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#define I596_CONF11_AUTOTX 0x08 /* Auto retransmit */
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#define I596_CONF11_CSBSAC_ 0x10 /* Collision detect by src addr cmp. */
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#define I596_CONF11_MCALL_ 0x20 /* Multicast all */
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#define I596_CONF13_RESERVED 0x3f /* Reserved: must be ones */
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#define I596_CONF13_MULTIA 0x40 /* Enable multiple addr. reception */
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#define I596_CONF13_DISBOF 0x80 /* Disable backoff algorithm */
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/*
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* I596_CB_MCAST: Multicast-Setup Command (p. 4-54)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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ushort count; /* Number of 6-byte addrs that follow */
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uchar addr[6][1];
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} I596_CB_MCAST;
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/*
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* I596_CB_XMIT: Transmit Command (p. 4-56)
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*/
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typedef I596_TFD I596_CB_XMIT;
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#define I596_CB_XMIT_NOCRC 0x0010 /* cmd: No CRC insertion */
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#define I596_CB_XMIT_FLEX 0x0008 /* cmd: Flexible memory mode */
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#define I596_CB_XMIT_ERR_LATE 0x0800 /* status: error: late collision */
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#define I596_CB_XMIT_ERR_NOCRS 0x0400 /* status: error: no carriers sense */
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#define I596_CB_XMIT_ERR_NOCTS 0x0200 /* status: error: loss of CTS */
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#define I596_CB_XMIT_ERR_UNDER 0x0100 /* status: error: DMA underrun */
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#define I596_CB_XMIT_ERR_MAXCOL 0x0020 /* status: error: maximum collisions */
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#define I596_CB_XMIT_COLLISIONS 0x000f /* status: number of collisions */
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/*
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* I596_CB_TDR: Time Domain Reflectometry Command (p. 4-63)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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ushort time;
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} I596_CB_TDR;
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/*
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* I596_CB_DUMP: Dump Command (p. 4-65)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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uchar *buf;
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} I596_CB_DUMP;
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/*
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* I596_CB_DIAG: Diagnose Command (p. 4-77)
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*/
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typedef volatile struct
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{
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ushort status;
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ushort cmd;
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union _I596_CB *next;
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} I596_CB_DIAG;
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/*
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* I596_CB: Command Block
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*/
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typedef union _I596_CB
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{
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I596_CB_NOP nop;
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I596_CB_IA ia;
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I596_CB_CONF conf;
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I596_CB_MCAST mcast;
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I596_CB_XMIT xmit;
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I596_CB_TDR tdr;
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I596_CB_DUMP dump;
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I596_CB_DIAG diag;
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/* command and status in one ulong for speed... */
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I596_CB_FAST fast;
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} I596_CB;
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/************************************************************************/
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/* */
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/* I596_SCB: System Configuration Block (p. 4-26) */
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/* */
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/************************************************************************/
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typedef volatile struct
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{
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volatile ushort status; /* Status word */
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volatile ushort cmd; /* Command word */
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I596_CB *cbp;
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I596_RFD *rfdp;
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ulong crc_errs;
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ulong align_errs;
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ulong resource_errs;
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ulong overrun_errs;
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ulong rcvcdt_errs;
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ulong short_errs;
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ushort toff;
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ushort ton;
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} I596_SCB;
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/* cmd halfword values */
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#define I596_SCB_ACK 0xF000 /* ACKNOWLEDGMENTS */
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#define I596_SCB_ACK_CX 0x8000 /* Ack command completion */
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#define I596_SCB_ACK_FR 0x4000 /* Ack received frame */
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#define I596_SCB_ACK_CNA 0x2000 /* Ack command unit not active */
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#define I596_SCB_ACK_RNR 0x1000 /* Ack rcv unit not ready */
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#define I596_SCB_ACK_ALL 0xF000 /* Ack everything */
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#define I596_SCB_CUC 0x0700 /* COMMAND UNIT COMMANDS */
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#define I596_SCB_CUC_NOP 0x0000 /* No operation */
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#define I596_SCB_CUC_START 0x0100 /* Start execution of first CB */
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#define I596_SCB_CUC_RESUME 0x0200 /* Resume execution */
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#define I596_SCB_CUC_SUSPEND 0x0300 /* Suspend after current CB */
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#define I596_SCB_CUC_ABORT 0x0400 /* Abort current CB immediately */
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#define I596_SCB_CUC_LOAD 0x0500 /* Load Bus throttle timers */
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#define I596_SCB_CUC_LOADIMM 0x0600 /* Load Bus throttle timers, now */
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#define I596_SCB_RUC 0x0070 /* RECEIVE UNIT COMMANDS */
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#define I596_SCB_RUC_NOP 0x0000 /* No operation */
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#define I596_SCB_RUC_START 0x0010 /* Start reception */
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#define I596_SCB_RUC_RESUME 0x0020 /* Resume reception */
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#define I596_SCB_RUC_SUSPEND 0x0030 /* Suspend reception */
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#define I596_SCB_RUC_ABORT 0x0040 /* Abort reception */
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#define I596_SCB_RESET 0x0080 /* Hard reset chip */
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/* status halfword values */
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#define I596_SCB_STAT 0xF000 /* STATUS */
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#define I596_SCB_CX 0x8000 /* command completion */
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#define I596_SCB_FR 0x4000 /* received frame */
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#define I596_SCB_CNA 0x2000 /* command unit not active */
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#define I596_SCB_RNR 0x1000 /* rcv unit not ready */
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#define I596_SCB_CUS 0x0700 /* COMMAND UNIT STATUS */
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#define I596_SCB_CUS_IDLE 0x0000 /* Idle */
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#define I596_SCB_CUS_SUSPENDED 0x0100 /* Suspended */
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#define I596_SCB_CUS_ACTIVE 0x0200 /* Active */
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#define I596_SCB_RUS 0x00F0 /* RECEIVE UNIT STATUS */
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#define I596_SCB_RUS_IDLE 0x0000 /* Idle */
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#define I596_SCB_RUS_SUSPENDED 0x0010 /* Suspended */
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#define I596_SCB_RUS_NORES 0x0020 /* No Resources */
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#define I596_SCB_RUS_READY 0x0040 /* Ready */
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#define I596_SCB_RUS_NORBDS 0x0080 /* No more RBDs modifier */
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#define I596_SCB_LOADED 0x0008 /* Bus timers loaded */
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/************************************************************************/
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/* */
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/* I596_ISCP: Intermediate System Configuration Ptr (p 4-26) */
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/* */
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/************************************************************************/
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typedef volatile struct
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{
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ulong busy; /* Set to 1; I596 clears it when scbp is read */
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I596_SCB *scbp;
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} I596_ISCP;
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/************************************************************************/
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/* */
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/* I596_SCP: System Configuration Pointer (p. 4-23) */
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/* */
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/************************************************************************/
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typedef volatile struct
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{
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ulong sysbus;
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ulong dummy;
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I596_ISCP *iscpp;
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} I596_SCP;
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/* .sysbus values */
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#define I596_SCP_RESERVED 0x400000 /* Reserved bits must be set */
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#define I596_SCP_INTLOW 0x200000 /* Intr. Polarity active low */
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#define I596_SCP_INTHIGH 0 /* Intr. Polarity active high */
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#define I596_SCP_LOCKDIS 0x100000 /* Lock Function disabled */
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#define I596_SCP_LOCKEN 0 /* Lock Function enabled */
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#define I596_SCP_ETHROTTLE 0x080000 /* External Bus Throttle */
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#define I596_SCP_ITHROTTLE 0 /* Internal Bus Throttle */
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#define I596_SCP_LINEAR 0x040000 /* Linear Mode */
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#define I596_SCP_SEGMENTED 0x020000 /* Segmented Mode */
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#define I596_SCP_82586 0x000000 /* 82586 Mode */
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