Bin Gao 7da7c15613 x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCs ... On SoCs that have the calibration MSRs available, either there is no PIT, HPET or PMTIMER to calibrate against, or the PIT/HPET/PMTIMER is driven from the same clock as the TSC, so calibration is redundant and just slows down the boot. TSC rate is caculated by this formula: <maximum core-clock to bus-clock ratio> * <maximum resolved frequency> The ratio and the resolved frequency ID can be obtained from MSR. See Intel 64 and IA-32 System Programming Guid section 16.12 and 30.11.5 for details. Signed-off-by: Bin Gao <bin.gao@intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/n/tip-rgm7xmg7k6qnjlw3ynkcjsmh@git.kernel.org		2014-01-15 22:28:48 -08:00
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asm	x86, tsc: Add static (MSR) TSC calibration on Intel Atom SoCs	2014-01-15 22:28:48 -08:00
uapi/asm	More ACPI and power management updates for 3.13-rc1	2013-11-20 13:25:04 -08:00