mirror of
https://github.com/edk2-porting/linux-next.git
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fb24ea52f7
mmiowb() is now implied by spin_unlock() on architectures that require it, so there is no reason to call it from driver code. This patch was generated using coccinelle: @mmiowb@ @@ - mmiowb(); and invoked as: $ for d in drivers include/linux/qed sound; do \ spatch --include-headers --sp-file mmiowb.cocci --dir $d --in-place; done NOTE: mmiowb() has only ever guaranteed ordering in conjunction with spin_unlock(). However, pairing each mmiowb() removal in this patch with the corresponding call to spin_unlock() is not at all trivial, so there is a small chance that this change may regress any drivers incorrectly relying on mmiowb() to order MMIO writes between CPUs using lock-free synchronisation. If you've ended up bisecting to this commit, you can reintroduce the mmiowb() calls using wmb() instead, which should restore the old behaviour on all architectures other than some esoteric ia64 systems. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
1003 lines
22 KiB
C
1003 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/**
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* xhci-dbgcap.c - xHCI debug capability support
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*
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* Copyright (C) 2017 Intel Corporation
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*
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* Author: Lu Baolu <baolu.lu@linux.intel.com>
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*/
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/nls.h>
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#include "xhci.h"
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#include "xhci-trace.h"
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#include "xhci-dbgcap.h"
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static inline void *
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dbc_dma_alloc_coherent(struct xhci_hcd *xhci, size_t size,
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dma_addr_t *dma_handle, gfp_t flags)
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{
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void *vaddr;
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vaddr = dma_alloc_coherent(xhci_to_hcd(xhci)->self.sysdev,
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size, dma_handle, flags);
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memset(vaddr, 0, size);
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return vaddr;
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}
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static inline void
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dbc_dma_free_coherent(struct xhci_hcd *xhci, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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if (cpu_addr)
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dma_free_coherent(xhci_to_hcd(xhci)->self.sysdev,
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size, cpu_addr, dma_handle);
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}
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static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
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{
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struct usb_string_descriptor *s_desc;
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u32 string_length;
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/* Serial string: */
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s_desc = (struct usb_string_descriptor *)strings->serial;
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utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length = s_desc->bLength;
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string_length <<= 8;
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/* Product string: */
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s_desc = (struct usb_string_descriptor *)strings->product;
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utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length += s_desc->bLength;
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string_length <<= 8;
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/* Manufacture string: */
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s_desc = (struct usb_string_descriptor *)strings->manufacturer;
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utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
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strlen(DBC_STRING_MANUFACTURER),
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UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
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DBC_MAX_STRING_LENGTH);
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s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
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s_desc->bDescriptorType = USB_DT_STRING;
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string_length += s_desc->bLength;
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string_length <<= 8;
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/* String0: */
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strings->string0[0] = 4;
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strings->string0[1] = USB_DT_STRING;
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strings->string0[2] = 0x09;
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strings->string0[3] = 0x04;
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string_length += 4;
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return string_length;
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}
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static void xhci_dbc_init_contexts(struct xhci_hcd *xhci, u32 string_length)
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{
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struct xhci_dbc *dbc;
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struct dbc_info_context *info;
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struct xhci_ep_ctx *ep_ctx;
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u32 dev_info;
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dma_addr_t deq, dma;
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unsigned int max_burst;
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dbc = xhci->dbc;
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if (!dbc)
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return;
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/* Populate info Context: */
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info = (struct dbc_info_context *)dbc->ctx->bytes;
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dma = dbc->string_dma;
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info->string0 = cpu_to_le64(dma);
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info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
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info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
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info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
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info->length = cpu_to_le32(string_length);
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/* Populate bulk out endpoint context: */
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ep_ctx = dbc_bulkout_ctx(dbc);
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max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
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deq = dbc_bulkout_enq(dbc);
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ep_ctx->ep_info = 0;
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ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
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ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
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/* Populate bulk in endpoint context: */
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ep_ctx = dbc_bulkin_ctx(dbc);
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deq = dbc_bulkin_enq(dbc);
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ep_ctx->ep_info = 0;
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ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
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ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
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/* Set DbC context and info registers: */
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xhci_write_64(xhci, dbc->ctx->dma, &dbc->regs->dccp);
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dev_info = cpu_to_le32((DBC_VENDOR_ID << 16) | DBC_PROTOCOL);
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writel(dev_info, &dbc->regs->devinfo1);
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dev_info = cpu_to_le32((DBC_DEVICE_REV << 16) | DBC_PRODUCT_ID);
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writel(dev_info, &dbc->regs->devinfo2);
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}
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static void xhci_dbc_giveback(struct dbc_request *req, int status)
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__releases(&dbc->lock)
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__acquires(&dbc->lock)
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{
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struct dbc_ep *dep = req->dep;
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struct xhci_dbc *dbc = dep->dbc;
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struct xhci_hcd *xhci = dbc->xhci;
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struct device *dev = xhci_to_hcd(dbc->xhci)->self.sysdev;
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list_del_init(&req->list_pending);
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req->trb_dma = 0;
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req->trb = NULL;
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if (req->status == -EINPROGRESS)
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req->status = status;
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trace_xhci_dbc_giveback_request(req);
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dma_unmap_single(dev,
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req->dma,
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req->length,
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dbc_ep_dma_direction(dep));
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/* Give back the transfer request: */
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spin_unlock(&dbc->lock);
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req->complete(xhci, req);
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spin_lock(&dbc->lock);
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}
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static void xhci_dbc_flush_single_request(struct dbc_request *req)
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{
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union xhci_trb *trb = req->trb;
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trb->generic.field[0] = 0;
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trb->generic.field[1] = 0;
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trb->generic.field[2] = 0;
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trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
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trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(TRB_TR_NOOP));
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xhci_dbc_giveback(req, -ESHUTDOWN);
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}
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static void xhci_dbc_flush_endpoint_requests(struct dbc_ep *dep)
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{
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struct dbc_request *req, *tmp;
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list_for_each_entry_safe(req, tmp, &dep->list_pending, list_pending)
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xhci_dbc_flush_single_request(req);
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}
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static void xhci_dbc_flush_requests(struct xhci_dbc *dbc)
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{
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xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]);
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xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]);
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}
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struct dbc_request *
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dbc_alloc_request(struct dbc_ep *dep, gfp_t gfp_flags)
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{
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struct dbc_request *req;
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req = kzalloc(sizeof(*req), gfp_flags);
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if (!req)
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return NULL;
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req->dep = dep;
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INIT_LIST_HEAD(&req->list_pending);
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INIT_LIST_HEAD(&req->list_pool);
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req->direction = dep->direction;
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trace_xhci_dbc_alloc_request(req);
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return req;
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}
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void
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dbc_free_request(struct dbc_ep *dep, struct dbc_request *req)
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{
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trace_xhci_dbc_free_request(req);
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kfree(req);
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}
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static void
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xhci_dbc_queue_trb(struct xhci_ring *ring, u32 field1,
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u32 field2, u32 field3, u32 field4)
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{
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union xhci_trb *trb, *next;
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trb = ring->enqueue;
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trb->generic.field[0] = cpu_to_le32(field1);
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trb->generic.field[1] = cpu_to_le32(field2);
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trb->generic.field[2] = cpu_to_le32(field3);
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trb->generic.field[3] = cpu_to_le32(field4);
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trace_xhci_dbc_gadget_ep_queue(ring, &trb->generic);
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ring->num_trbs_free--;
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next = ++(ring->enqueue);
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if (TRB_TYPE_LINK_LE32(next->link.control)) {
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next->link.control ^= cpu_to_le32(TRB_CYCLE);
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ring->enqueue = ring->enq_seg->trbs;
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ring->cycle_state ^= 1;
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}
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}
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static int xhci_dbc_queue_bulk_tx(struct dbc_ep *dep,
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struct dbc_request *req)
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{
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u64 addr;
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union xhci_trb *trb;
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unsigned int num_trbs;
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struct xhci_dbc *dbc = dep->dbc;
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struct xhci_ring *ring = dep->ring;
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u32 length, control, cycle;
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num_trbs = count_trbs(req->dma, req->length);
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WARN_ON(num_trbs != 1);
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if (ring->num_trbs_free < num_trbs)
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return -EBUSY;
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addr = req->dma;
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trb = ring->enqueue;
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cycle = ring->cycle_state;
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length = TRB_LEN(req->length);
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control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
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if (cycle)
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control &= cpu_to_le32(~TRB_CYCLE);
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else
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control |= cpu_to_le32(TRB_CYCLE);
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req->trb = ring->enqueue;
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req->trb_dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
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xhci_dbc_queue_trb(ring,
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lower_32_bits(addr),
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upper_32_bits(addr),
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length, control);
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/*
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* Add a barrier between writes of trb fields and flipping
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* the cycle bit:
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*/
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wmb();
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if (cycle)
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trb->generic.field[3] |= cpu_to_le32(TRB_CYCLE);
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else
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trb->generic.field[3] &= cpu_to_le32(~TRB_CYCLE);
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writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
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return 0;
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}
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static int
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dbc_ep_do_queue(struct dbc_ep *dep, struct dbc_request *req)
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{
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int ret;
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struct device *dev;
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struct xhci_dbc *dbc = dep->dbc;
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struct xhci_hcd *xhci = dbc->xhci;
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dev = xhci_to_hcd(xhci)->self.sysdev;
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if (!req->length || !req->buf)
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return -EINVAL;
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req->actual = 0;
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req->status = -EINPROGRESS;
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req->dma = dma_map_single(dev,
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req->buf,
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req->length,
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dbc_ep_dma_direction(dep));
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if (dma_mapping_error(dev, req->dma)) {
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xhci_err(xhci, "failed to map buffer\n");
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return -EFAULT;
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}
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ret = xhci_dbc_queue_bulk_tx(dep, req);
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if (ret) {
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xhci_err(xhci, "failed to queue trbs\n");
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dma_unmap_single(dev,
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req->dma,
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req->length,
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dbc_ep_dma_direction(dep));
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return -EFAULT;
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}
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list_add_tail(&req->list_pending, &dep->list_pending);
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return 0;
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}
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int dbc_ep_queue(struct dbc_ep *dep, struct dbc_request *req,
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gfp_t gfp_flags)
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{
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unsigned long flags;
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struct xhci_dbc *dbc = dep->dbc;
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int ret = -ESHUTDOWN;
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spin_lock_irqsave(&dbc->lock, flags);
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if (dbc->state == DS_CONFIGURED)
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ret = dbc_ep_do_queue(dep, req);
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spin_unlock_irqrestore(&dbc->lock, flags);
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mod_delayed_work(system_wq, &dbc->event_work, 0);
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trace_xhci_dbc_queue_request(req);
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return ret;
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}
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static inline void xhci_dbc_do_eps_init(struct xhci_hcd *xhci, bool direction)
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{
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struct dbc_ep *dep;
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struct xhci_dbc *dbc = xhci->dbc;
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dep = &dbc->eps[direction];
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dep->dbc = dbc;
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dep->direction = direction;
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dep->ring = direction ? dbc->ring_in : dbc->ring_out;
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INIT_LIST_HEAD(&dep->list_pending);
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}
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static void xhci_dbc_eps_init(struct xhci_hcd *xhci)
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{
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xhci_dbc_do_eps_init(xhci, BULK_OUT);
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xhci_dbc_do_eps_init(xhci, BULK_IN);
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}
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static void xhci_dbc_eps_exit(struct xhci_hcd *xhci)
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{
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struct xhci_dbc *dbc = xhci->dbc;
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memset(dbc->eps, 0, sizeof(struct dbc_ep) * ARRAY_SIZE(dbc->eps));
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}
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static int xhci_dbc_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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{
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int ret;
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dma_addr_t deq;
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u32 string_length;
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struct xhci_dbc *dbc = xhci->dbc;
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/* Allocate various rings for events and transfers: */
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dbc->ring_evt = xhci_ring_alloc(xhci, 1, 1, TYPE_EVENT, 0, flags);
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if (!dbc->ring_evt)
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goto evt_fail;
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dbc->ring_in = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
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if (!dbc->ring_in)
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goto in_fail;
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dbc->ring_out = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
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if (!dbc->ring_out)
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goto out_fail;
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/* Allocate and populate ERST: */
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ret = xhci_alloc_erst(xhci, dbc->ring_evt, &dbc->erst, flags);
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if (ret)
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goto erst_fail;
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/* Allocate context data structure: */
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dbc->ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
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if (!dbc->ctx)
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goto ctx_fail;
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/* Allocate the string table: */
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dbc->string_size = sizeof(struct dbc_str_descs);
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dbc->string = dbc_dma_alloc_coherent(xhci,
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dbc->string_size,
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&dbc->string_dma,
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flags);
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if (!dbc->string)
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goto string_fail;
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/* Setup ERST register: */
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writel(dbc->erst.erst_size, &dbc->regs->ersts);
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xhci_write_64(xhci, dbc->erst.erst_dma_addr, &dbc->regs->erstba);
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deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
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dbc->ring_evt->dequeue);
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xhci_write_64(xhci, deq, &dbc->regs->erdp);
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/* Setup strings and contexts: */
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string_length = xhci_dbc_populate_strings(dbc->string);
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xhci_dbc_init_contexts(xhci, string_length);
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xhci_dbc_eps_init(xhci);
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dbc->state = DS_INITIALIZED;
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return 0;
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string_fail:
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xhci_free_container_ctx(xhci, dbc->ctx);
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dbc->ctx = NULL;
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ctx_fail:
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xhci_free_erst(xhci, &dbc->erst);
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erst_fail:
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xhci_ring_free(xhci, dbc->ring_out);
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dbc->ring_out = NULL;
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out_fail:
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xhci_ring_free(xhci, dbc->ring_in);
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dbc->ring_in = NULL;
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in_fail:
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xhci_ring_free(xhci, dbc->ring_evt);
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dbc->ring_evt = NULL;
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evt_fail:
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return -ENOMEM;
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}
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|
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static void xhci_dbc_mem_cleanup(struct xhci_hcd *xhci)
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{
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struct xhci_dbc *dbc = xhci->dbc;
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|
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if (!dbc)
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return;
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|
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xhci_dbc_eps_exit(xhci);
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|
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if (dbc->string) {
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dbc_dma_free_coherent(xhci,
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dbc->string_size,
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dbc->string, dbc->string_dma);
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dbc->string = NULL;
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}
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|
|
xhci_free_container_ctx(xhci, dbc->ctx);
|
|
dbc->ctx = NULL;
|
|
|
|
xhci_free_erst(xhci, &dbc->erst);
|
|
xhci_ring_free(xhci, dbc->ring_out);
|
|
xhci_ring_free(xhci, dbc->ring_in);
|
|
xhci_ring_free(xhci, dbc->ring_evt);
|
|
dbc->ring_in = NULL;
|
|
dbc->ring_out = NULL;
|
|
dbc->ring_evt = NULL;
|
|
}
|
|
|
|
static int xhci_do_dbc_start(struct xhci_hcd *xhci)
|
|
{
|
|
int ret;
|
|
u32 ctrl;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (dbc->state != DS_DISABLED)
|
|
return -EINVAL;
|
|
|
|
writel(0, &dbc->regs->control);
|
|
ret = xhci_handshake(&dbc->regs->control,
|
|
DBC_CTRL_DBC_ENABLE,
|
|
0, 1000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = xhci_dbc_mem_init(xhci, GFP_ATOMIC);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ctrl = readl(&dbc->regs->control);
|
|
writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
|
|
&dbc->regs->control);
|
|
ret = xhci_handshake(&dbc->regs->control,
|
|
DBC_CTRL_DBC_ENABLE,
|
|
DBC_CTRL_DBC_ENABLE, 1000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dbc->state = DS_ENABLED;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int xhci_do_dbc_stop(struct xhci_hcd *xhci)
|
|
{
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (dbc->state == DS_DISABLED)
|
|
return -1;
|
|
|
|
writel(0, &dbc->regs->control);
|
|
dbc->state = DS_DISABLED;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int xhci_dbc_start(struct xhci_hcd *xhci)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
WARN_ON(!dbc);
|
|
|
|
pm_runtime_get_sync(xhci_to_hcd(xhci)->self.controller);
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
ret = xhci_do_dbc_start(xhci);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
if (ret) {
|
|
pm_runtime_put(xhci_to_hcd(xhci)->self.controller);
|
|
return ret;
|
|
}
|
|
|
|
return mod_delayed_work(system_wq, &dbc->event_work, 1);
|
|
}
|
|
|
|
static void xhci_dbc_stop(struct xhci_hcd *xhci)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
struct dbc_port *port = &dbc->port;
|
|
|
|
WARN_ON(!dbc);
|
|
|
|
cancel_delayed_work_sync(&dbc->event_work);
|
|
|
|
if (port->registered)
|
|
xhci_dbc_tty_unregister_device(xhci);
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
ret = xhci_do_dbc_stop(xhci);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
if (!ret) {
|
|
xhci_dbc_mem_cleanup(xhci);
|
|
pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller);
|
|
}
|
|
}
|
|
|
|
static void
|
|
dbc_handle_port_status(struct xhci_hcd *xhci, union xhci_trb *event)
|
|
{
|
|
u32 portsc;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (portsc & DBC_PORTSC_CONN_CHANGE)
|
|
xhci_info(xhci, "DbC port connect change\n");
|
|
|
|
if (portsc & DBC_PORTSC_RESET_CHANGE)
|
|
xhci_info(xhci, "DbC port reset change\n");
|
|
|
|
if (portsc & DBC_PORTSC_LINK_CHANGE)
|
|
xhci_info(xhci, "DbC port link status change\n");
|
|
|
|
if (portsc & DBC_PORTSC_CONFIG_CHANGE)
|
|
xhci_info(xhci, "DbC config error change\n");
|
|
|
|
/* Port reset change bit will be cleared in other place: */
|
|
writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
|
|
}
|
|
|
|
static void dbc_handle_xfer_event(struct xhci_hcd *xhci, union xhci_trb *event)
|
|
{
|
|
struct dbc_ep *dep;
|
|
struct xhci_ring *ring;
|
|
int ep_id;
|
|
int status;
|
|
u32 comp_code;
|
|
size_t remain_length;
|
|
struct dbc_request *req = NULL, *r;
|
|
|
|
comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2]));
|
|
remain_length = EVENT_TRB_LEN(le32_to_cpu(event->generic.field[2]));
|
|
ep_id = TRB_TO_EP_ID(le32_to_cpu(event->generic.field[3]));
|
|
dep = (ep_id == EPID_OUT) ?
|
|
get_out_ep(xhci) : get_in_ep(xhci);
|
|
ring = dep->ring;
|
|
|
|
switch (comp_code) {
|
|
case COMP_SUCCESS:
|
|
remain_length = 0;
|
|
/* FALLTHROUGH */
|
|
case COMP_SHORT_PACKET:
|
|
status = 0;
|
|
break;
|
|
case COMP_TRB_ERROR:
|
|
case COMP_BABBLE_DETECTED_ERROR:
|
|
case COMP_USB_TRANSACTION_ERROR:
|
|
case COMP_STALL_ERROR:
|
|
xhci_warn(xhci, "tx error %d detected\n", comp_code);
|
|
status = -comp_code;
|
|
break;
|
|
default:
|
|
xhci_err(xhci, "unknown tx error %d\n", comp_code);
|
|
status = -comp_code;
|
|
break;
|
|
}
|
|
|
|
/* Match the pending request: */
|
|
list_for_each_entry(r, &dep->list_pending, list_pending) {
|
|
if (r->trb_dma == event->trans_event.buffer) {
|
|
req = r;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!req) {
|
|
xhci_warn(xhci, "no matched request\n");
|
|
return;
|
|
}
|
|
|
|
trace_xhci_dbc_handle_transfer(ring, &req->trb->generic);
|
|
|
|
ring->num_trbs_free++;
|
|
req->actual = req->length - remain_length;
|
|
xhci_dbc_giveback(req, status);
|
|
}
|
|
|
|
static enum evtreturn xhci_dbc_do_handle_events(struct xhci_dbc *dbc)
|
|
{
|
|
dma_addr_t deq;
|
|
struct dbc_ep *dep;
|
|
union xhci_trb *evt;
|
|
u32 ctrl, portsc;
|
|
struct xhci_hcd *xhci = dbc->xhci;
|
|
bool update_erdp = false;
|
|
|
|
/* DbC state machine: */
|
|
switch (dbc->state) {
|
|
case DS_DISABLED:
|
|
case DS_INITIALIZED:
|
|
|
|
return EVT_ERR;
|
|
case DS_ENABLED:
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (portsc & DBC_PORTSC_CONN_STATUS) {
|
|
dbc->state = DS_CONNECTED;
|
|
xhci_info(xhci, "DbC connected\n");
|
|
}
|
|
|
|
return EVT_DONE;
|
|
case DS_CONNECTED:
|
|
ctrl = readl(&dbc->regs->control);
|
|
if (ctrl & DBC_CTRL_DBC_RUN) {
|
|
dbc->state = DS_CONFIGURED;
|
|
xhci_info(xhci, "DbC configured\n");
|
|
portsc = readl(&dbc->regs->portsc);
|
|
writel(portsc, &dbc->regs->portsc);
|
|
return EVT_GSER;
|
|
}
|
|
|
|
return EVT_DONE;
|
|
case DS_CONFIGURED:
|
|
/* Handle cable unplug event: */
|
|
portsc = readl(&dbc->regs->portsc);
|
|
if (!(portsc & DBC_PORTSC_PORT_ENABLED) &&
|
|
!(portsc & DBC_PORTSC_CONN_STATUS)) {
|
|
xhci_info(xhci, "DbC cable unplugged\n");
|
|
dbc->state = DS_ENABLED;
|
|
xhci_dbc_flush_requests(dbc);
|
|
|
|
return EVT_DISC;
|
|
}
|
|
|
|
/* Handle debug port reset event: */
|
|
if (portsc & DBC_PORTSC_RESET_CHANGE) {
|
|
xhci_info(xhci, "DbC port reset\n");
|
|
writel(portsc, &dbc->regs->portsc);
|
|
dbc->state = DS_ENABLED;
|
|
xhci_dbc_flush_requests(dbc);
|
|
|
|
return EVT_DISC;
|
|
}
|
|
|
|
/* Handle endpoint stall event: */
|
|
ctrl = readl(&dbc->regs->control);
|
|
if ((ctrl & DBC_CTRL_HALT_IN_TR) ||
|
|
(ctrl & DBC_CTRL_HALT_OUT_TR)) {
|
|
xhci_info(xhci, "DbC Endpoint stall\n");
|
|
dbc->state = DS_STALLED;
|
|
|
|
if (ctrl & DBC_CTRL_HALT_IN_TR) {
|
|
dep = get_in_ep(xhci);
|
|
xhci_dbc_flush_endpoint_requests(dep);
|
|
}
|
|
|
|
if (ctrl & DBC_CTRL_HALT_OUT_TR) {
|
|
dep = get_out_ep(xhci);
|
|
xhci_dbc_flush_endpoint_requests(dep);
|
|
}
|
|
|
|
return EVT_DONE;
|
|
}
|
|
|
|
/* Clear DbC run change bit: */
|
|
if (ctrl & DBC_CTRL_DBC_RUN_CHANGE) {
|
|
writel(ctrl, &dbc->regs->control);
|
|
ctrl = readl(&dbc->regs->control);
|
|
}
|
|
|
|
break;
|
|
case DS_STALLED:
|
|
ctrl = readl(&dbc->regs->control);
|
|
if (!(ctrl & DBC_CTRL_HALT_IN_TR) &&
|
|
!(ctrl & DBC_CTRL_HALT_OUT_TR) &&
|
|
(ctrl & DBC_CTRL_DBC_RUN)) {
|
|
dbc->state = DS_CONFIGURED;
|
|
break;
|
|
}
|
|
|
|
return EVT_DONE;
|
|
default:
|
|
xhci_err(xhci, "Unknown DbC state %d\n", dbc->state);
|
|
break;
|
|
}
|
|
|
|
/* Handle the events in the event ring: */
|
|
evt = dbc->ring_evt->dequeue;
|
|
while ((le32_to_cpu(evt->event_cmd.flags) & TRB_CYCLE) ==
|
|
dbc->ring_evt->cycle_state) {
|
|
/*
|
|
* Add a barrier between reading the cycle flag and any
|
|
* reads of the event's flags/data below:
|
|
*/
|
|
rmb();
|
|
|
|
trace_xhci_dbc_handle_event(dbc->ring_evt, &evt->generic);
|
|
|
|
switch (le32_to_cpu(evt->event_cmd.flags) & TRB_TYPE_BITMASK) {
|
|
case TRB_TYPE(TRB_PORT_STATUS):
|
|
dbc_handle_port_status(xhci, evt);
|
|
break;
|
|
case TRB_TYPE(TRB_TRANSFER):
|
|
dbc_handle_xfer_event(xhci, evt);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
inc_deq(xhci, dbc->ring_evt);
|
|
evt = dbc->ring_evt->dequeue;
|
|
update_erdp = true;
|
|
}
|
|
|
|
/* Update event ring dequeue pointer: */
|
|
if (update_erdp) {
|
|
deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
|
|
dbc->ring_evt->dequeue);
|
|
xhci_write_64(xhci, deq, &dbc->regs->erdp);
|
|
}
|
|
|
|
return EVT_DONE;
|
|
}
|
|
|
|
static void xhci_dbc_handle_events(struct work_struct *work)
|
|
{
|
|
int ret;
|
|
enum evtreturn evtr;
|
|
struct xhci_dbc *dbc;
|
|
unsigned long flags;
|
|
struct xhci_hcd *xhci;
|
|
|
|
dbc = container_of(to_delayed_work(work), struct xhci_dbc, event_work);
|
|
xhci = dbc->xhci;
|
|
|
|
spin_lock_irqsave(&dbc->lock, flags);
|
|
evtr = xhci_dbc_do_handle_events(dbc);
|
|
spin_unlock_irqrestore(&dbc->lock, flags);
|
|
|
|
switch (evtr) {
|
|
case EVT_GSER:
|
|
ret = xhci_dbc_tty_register_device(xhci);
|
|
if (ret) {
|
|
xhci_err(xhci, "failed to alloc tty device\n");
|
|
break;
|
|
}
|
|
|
|
xhci_info(xhci, "DbC now attached to /dev/ttyDBC0\n");
|
|
break;
|
|
case EVT_DISC:
|
|
xhci_dbc_tty_unregister_device(xhci);
|
|
break;
|
|
case EVT_DONE:
|
|
break;
|
|
default:
|
|
xhci_info(xhci, "stop handling dbc events\n");
|
|
return;
|
|
}
|
|
|
|
mod_delayed_work(system_wq, &dbc->event_work, 1);
|
|
}
|
|
|
|
static void xhci_do_dbc_exit(struct xhci_hcd *xhci)
|
|
{
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
kfree(xhci->dbc);
|
|
xhci->dbc = NULL;
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
}
|
|
|
|
static int xhci_do_dbc_init(struct xhci_hcd *xhci)
|
|
{
|
|
u32 reg;
|
|
struct xhci_dbc *dbc;
|
|
unsigned long flags;
|
|
void __iomem *base;
|
|
int dbc_cap_offs;
|
|
|
|
base = &xhci->cap_regs->hc_capbase;
|
|
dbc_cap_offs = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_DEBUG);
|
|
if (!dbc_cap_offs)
|
|
return -ENODEV;
|
|
|
|
dbc = kzalloc(sizeof(*dbc), GFP_KERNEL);
|
|
if (!dbc)
|
|
return -ENOMEM;
|
|
|
|
dbc->regs = base + dbc_cap_offs;
|
|
|
|
/* We will avoid using DbC in xhci driver if it's in use. */
|
|
reg = readl(&dbc->regs->control);
|
|
if (reg & DBC_CTRL_DBC_ENABLE) {
|
|
kfree(dbc);
|
|
return -EBUSY;
|
|
}
|
|
|
|
spin_lock_irqsave(&xhci->lock, flags);
|
|
if (xhci->dbc) {
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
kfree(dbc);
|
|
return -EBUSY;
|
|
}
|
|
xhci->dbc = dbc;
|
|
spin_unlock_irqrestore(&xhci->lock, flags);
|
|
|
|
dbc->xhci = xhci;
|
|
INIT_DELAYED_WORK(&dbc->event_work, xhci_dbc_handle_events);
|
|
spin_lock_init(&dbc->lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t dbc_show(struct device *dev,
|
|
struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
const char *p;
|
|
struct xhci_dbc *dbc;
|
|
struct xhci_hcd *xhci;
|
|
|
|
xhci = hcd_to_xhci(dev_get_drvdata(dev));
|
|
dbc = xhci->dbc;
|
|
|
|
switch (dbc->state) {
|
|
case DS_DISABLED:
|
|
p = "disabled";
|
|
break;
|
|
case DS_INITIALIZED:
|
|
p = "initialized";
|
|
break;
|
|
case DS_ENABLED:
|
|
p = "enabled";
|
|
break;
|
|
case DS_CONNECTED:
|
|
p = "connected";
|
|
break;
|
|
case DS_CONFIGURED:
|
|
p = "configured";
|
|
break;
|
|
case DS_STALLED:
|
|
p = "stalled";
|
|
break;
|
|
default:
|
|
p = "unknown";
|
|
}
|
|
|
|
return sprintf(buf, "%s\n", p);
|
|
}
|
|
|
|
static ssize_t dbc_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct xhci_hcd *xhci;
|
|
|
|
xhci = hcd_to_xhci(dev_get_drvdata(dev));
|
|
|
|
if (!strncmp(buf, "enable", 6))
|
|
xhci_dbc_start(xhci);
|
|
else if (!strncmp(buf, "disable", 7))
|
|
xhci_dbc_stop(xhci);
|
|
else
|
|
return -EINVAL;
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR_RW(dbc);
|
|
|
|
int xhci_dbc_init(struct xhci_hcd *xhci)
|
|
{
|
|
int ret;
|
|
struct device *dev = xhci_to_hcd(xhci)->self.controller;
|
|
|
|
ret = xhci_do_dbc_init(xhci);
|
|
if (ret)
|
|
goto init_err3;
|
|
|
|
ret = xhci_dbc_tty_register_driver(xhci);
|
|
if (ret)
|
|
goto init_err2;
|
|
|
|
ret = device_create_file(dev, &dev_attr_dbc);
|
|
if (ret)
|
|
goto init_err1;
|
|
|
|
return 0;
|
|
|
|
init_err1:
|
|
xhci_dbc_tty_unregister_driver();
|
|
init_err2:
|
|
xhci_do_dbc_exit(xhci);
|
|
init_err3:
|
|
return ret;
|
|
}
|
|
|
|
void xhci_dbc_exit(struct xhci_hcd *xhci)
|
|
{
|
|
struct device *dev = xhci_to_hcd(xhci)->self.controller;
|
|
|
|
if (!xhci->dbc)
|
|
return;
|
|
|
|
device_remove_file(dev, &dev_attr_dbc);
|
|
xhci_dbc_tty_unregister_driver();
|
|
xhci_dbc_stop(xhci);
|
|
xhci_do_dbc_exit(xhci);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
int xhci_dbc_suspend(struct xhci_hcd *xhci)
|
|
{
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (!dbc)
|
|
return 0;
|
|
|
|
if (dbc->state == DS_CONFIGURED)
|
|
dbc->resume_required = 1;
|
|
|
|
xhci_dbc_stop(xhci);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int xhci_dbc_resume(struct xhci_hcd *xhci)
|
|
{
|
|
int ret = 0;
|
|
struct xhci_dbc *dbc = xhci->dbc;
|
|
|
|
if (!dbc)
|
|
return 0;
|
|
|
|
if (dbc->resume_required) {
|
|
dbc->resume_required = 0;
|
|
xhci_dbc_start(xhci);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
#endif /* CONFIG_PM */
|