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5a0e9b5718
Nick Piggin discovered that lwsync barriers around locks were faster than isync on 970. That was a long time ago and I completely dropped the ball in testing his patches across other ppc64 processors. Turns out the idea helps on other chips. Using a microbenchmark that uses a lot of threads to contend on a global pthread mutex (and therefore a global futex), POWER6 improves 8% and POWER7 improves 2%. I checked POWER5 and while I couldn't measure an improvement, there was no regression. This patch uses the lwsync patching code to replace the isyncs with lwsyncs on CPUs that support the instruction. We were marking POWER3 and RS64 as lwsync capable but in reality they treat it as a full sync (ie slow). Remove the CPU_FTR_LWSYNC bit from these CPUs so they continue to use the faster isync method. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
#ifndef _ASM_POWERPC_SYNCH_H
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#define _ASM_POWERPC_SYNCH_H
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#ifdef __KERNEL__
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#include <linux/stringify.h>
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#include <asm/feature-fixups.h>
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#if defined(__powerpc64__) || defined(CONFIG_PPC_E500MC)
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#define __SUBARCH_HAS_LWSYNC
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#endif
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#ifndef __ASSEMBLY__
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extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
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extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
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void *fixup_end);
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static inline void eieio(void)
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{
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__asm__ __volatile__ ("eieio" : : : "memory");
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}
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static inline void isync(void)
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{
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__asm__ __volatile__ ("isync" : : : "memory");
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}
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#endif /* __ASSEMBLY__ */
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#if defined(__powerpc64__)
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# define LWSYNC lwsync
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#elif defined(CONFIG_E500)
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# define LWSYNC \
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START_LWSYNC_SECTION(96); \
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sync; \
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MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
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#else
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# define LWSYNC sync
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#endif
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#ifdef CONFIG_SMP
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#define __PPC_ACQUIRE_BARRIER \
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START_LWSYNC_SECTION(97); \
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isync; \
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MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
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#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
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#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
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#else
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#define PPC_ACQUIRE_BARRIER
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#define PPC_RELEASE_BARRIER
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#endif
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SYNCH_H */
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