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7b0b0ec157
Table 4 of the datasheet specifies the mode control, these are not individual bits; add multi LED mode Add multi-LED mode and fix MODE_MASK (3 bits wide, not 2) Signed-off-by: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Acked-by: Matt Ranostay <matt.ranostay@konsulko.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
486 lines
12 KiB
C
486 lines
12 KiB
C
/*
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* max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
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*
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* Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* TODO: proximity power saving feature
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/irq.h>
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#include <linux/i2c.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/kfifo_buf.h>
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#define MAX30102_REGMAP_NAME "max30102_regmap"
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#define MAX30102_DRV_NAME "max30102"
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#define MAX30102_REG_INT_STATUS 0x00
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#define MAX30102_REG_INT_STATUS_PWR_RDY BIT(0)
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#define MAX30102_REG_INT_STATUS_PROX_INT BIT(4)
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#define MAX30102_REG_INT_STATUS_ALC_OVF BIT(5)
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#define MAX30102_REG_INT_STATUS_PPG_RDY BIT(6)
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#define MAX30102_REG_INT_STATUS_FIFO_RDY BIT(7)
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#define MAX30102_REG_INT_ENABLE 0x02
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#define MAX30102_REG_INT_ENABLE_PROX_INT_EN BIT(4)
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#define MAX30102_REG_INT_ENABLE_ALC_OVF_EN BIT(5)
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#define MAX30102_REG_INT_ENABLE_PPG_EN BIT(6)
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#define MAX30102_REG_INT_ENABLE_FIFO_EN BIT(7)
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#define MAX30102_REG_INT_ENABLE_MASK 0xf0
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#define MAX30102_REG_INT_ENABLE_MASK_SHIFT 4
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#define MAX30102_REG_FIFO_WR_PTR 0x04
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#define MAX30102_REG_FIFO_OVR_CTR 0x05
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#define MAX30102_REG_FIFO_RD_PTR 0x06
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#define MAX30102_REG_FIFO_DATA 0x07
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#define MAX30102_REG_FIFO_DATA_ENTRY_LEN 6
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#define MAX30102_REG_FIFO_CONFIG 0x08
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#define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES BIT(1)
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#define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT 5
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#define MAX30102_REG_FIFO_CONFIG_AFULL BIT(0)
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#define MAX30102_REG_MODE_CONFIG 0x09
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#define MAX30102_REG_MODE_CONFIG_MODE_HR 0x02 /* red LED */
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#define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2 0x03 /* red + IR LED */
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#define MAX30102_REG_MODE_CONFIG_MODE_MULTI 0x07 /* multi-LED mode */
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#define MAX30102_REG_MODE_CONFIG_MODE_MASK GENMASK(2, 0)
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#define MAX30102_REG_MODE_CONFIG_PWR BIT(7)
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#define MAX30102_REG_SPO2_CONFIG 0x0a
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#define MAX30102_REG_SPO2_CONFIG_PULSE_411_US 0x03
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#define MAX30102_REG_SPO2_CONFIG_SR_400HZ 0x03
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#define MAX30102_REG_SPO2_CONFIG_SR_MASK 0x07
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#define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT 2
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#define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS BIT(0)
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#define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT 5
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#define MAX30102_REG_RED_LED_CONFIG 0x0c
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#define MAX30102_REG_IR_LED_CONFIG 0x0d
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#define MAX30102_REG_TEMP_CONFIG 0x21
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#define MAX30102_REG_TEMP_CONFIG_TEMP_EN BIT(0)
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#define MAX30102_REG_TEMP_INTEGER 0x1f
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#define MAX30102_REG_TEMP_FRACTION 0x20
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struct max30102_data {
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struct i2c_client *client;
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struct iio_dev *indio_dev;
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struct mutex lock;
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struct regmap *regmap;
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u8 buffer[8];
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__be32 processed_buffer[2]; /* 2 x 18-bit (padded to 32-bits) */
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};
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static const struct regmap_config max30102_regmap_config = {
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.name = MAX30102_REGMAP_NAME,
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.reg_bits = 8,
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.val_bits = 8,
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};
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static const unsigned long max30102_scan_masks[] = {0x3, 0};
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static const struct iio_chan_spec max30102_channels[] = {
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{
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.type = IIO_INTENSITY,
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.channel2 = IIO_MOD_LIGHT_RED,
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.modified = 1,
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.scan_index = 0,
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.scan_type = {
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.sign = 'u',
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.shift = 8,
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.realbits = 18,
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.storagebits = 32,
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.endianness = IIO_BE,
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},
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},
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{
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.type = IIO_INTENSITY,
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.channel2 = IIO_MOD_LIGHT_IR,
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.modified = 1,
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.scan_index = 1,
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.scan_type = {
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.sign = 'u',
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.shift = 8,
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.realbits = 18,
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.storagebits = 32,
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.endianness = IIO_BE,
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},
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},
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{
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.type = IIO_TEMP,
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.info_mask_separate =
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BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
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.scan_index = -1,
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},
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};
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static int max30102_set_powermode(struct max30102_data *data, bool state)
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{
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return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
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MAX30102_REG_MODE_CONFIG_PWR,
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state ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
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}
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static int max30102_buffer_postenable(struct iio_dev *indio_dev)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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return max30102_set_powermode(data, true);
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}
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static int max30102_buffer_predisable(struct iio_dev *indio_dev)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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return max30102_set_powermode(data, false);
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}
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static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
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.postenable = max30102_buffer_postenable,
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.predisable = max30102_buffer_predisable,
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};
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static inline int max30102_fifo_count(struct max30102_data *data)
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{
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unsigned int val;
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int ret;
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ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
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if (ret)
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return ret;
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/* FIFO has one sample slot left */
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if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
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return 1;
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return 0;
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}
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static int max30102_read_measurement(struct max30102_data *data)
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{
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int ret;
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u8 *buffer = (u8 *) &data->buffer;
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ret = i2c_smbus_read_i2c_block_data(data->client,
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MAX30102_REG_FIFO_DATA,
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MAX30102_REG_FIFO_DATA_ENTRY_LEN,
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buffer);
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memcpy(&data->processed_buffer[0], &buffer[0], 3);
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memcpy(&data->processed_buffer[1], &buffer[3], 3);
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return (ret == MAX30102_REG_FIFO_DATA_ENTRY_LEN) ? 0 : -EINVAL;
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}
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static irqreturn_t max30102_interrupt_handler(int irq, void *private)
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{
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struct iio_dev *indio_dev = private;
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struct max30102_data *data = iio_priv(indio_dev);
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int ret, cnt = 0;
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mutex_lock(&data->lock);
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while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
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ret = max30102_read_measurement(data);
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if (ret)
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break;
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iio_push_to_buffers(data->indio_dev, data->processed_buffer);
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cnt--;
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}
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mutex_unlock(&data->lock);
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return IRQ_HANDLED;
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}
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static int max30102_get_current_idx(unsigned int val, int *reg)
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{
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/* each step is 0.200 mA */
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*reg = val / 200;
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return *reg > 0xff ? -EINVAL : 0;
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}
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static int max30102_led_init(struct max30102_data *data)
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{
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struct device *dev = &data->client->dev;
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struct device_node *np = dev->of_node;
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unsigned int val;
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int reg, ret;
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ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
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if (ret) {
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dev_info(dev, "no red-led-current-microamp set\n");
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/* Default to 7 mA RED LED */
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val = 7000;
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}
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ret = max30102_get_current_idx(val, ®);
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if (ret) {
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dev_err(dev, "invalid RED LED current setting %d\n", val);
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return ret;
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}
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ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
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if (ret)
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return ret;
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ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
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if (ret) {
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dev_info(dev, "no ir-led-current-microamp set\n");
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/* Default to 7 mA IR LED */
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val = 7000;
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}
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ret = max30102_get_current_idx(val, ®);
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if (ret) {
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dev_err(dev, "invalid IR LED current setting %d\n", val);
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return ret;
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}
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return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
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}
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static int max30102_chip_init(struct max30102_data *data)
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{
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int ret;
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/* setup LED current settings */
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ret = max30102_led_init(data);
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if (ret)
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return ret;
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/* enable 18-bit HR + SPO2 readings at 400Hz */
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ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
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(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
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<< MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
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(MAX30102_REG_SPO2_CONFIG_SR_400HZ
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<< MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
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MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
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if (ret)
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return ret;
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/* enable HR + SPO2 mode */
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ret = regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
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MAX30102_REG_MODE_CONFIG_MODE_MASK,
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MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2);
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if (ret)
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return ret;
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/* average 4 samples + generate FIFO interrupt */
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ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
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(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
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<< MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
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MAX30102_REG_FIFO_CONFIG_AFULL);
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if (ret)
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return ret;
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/* enable FIFO interrupt */
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return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
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MAX30102_REG_INT_ENABLE_MASK,
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MAX30102_REG_INT_ENABLE_FIFO_EN);
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}
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static int max30102_read_temp(struct max30102_data *data, int *val)
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{
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int ret;
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unsigned int reg;
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ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, ®);
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if (ret < 0)
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return ret;
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*val = reg << 4;
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ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, ®);
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if (ret < 0)
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return ret;
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*val |= reg & 0xf;
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*val = sign_extend32(*val, 11);
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return 0;
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}
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static int max30102_get_temp(struct max30102_data *data, int *val)
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{
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int ret;
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/* start acquisition */
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ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
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MAX30102_REG_TEMP_CONFIG_TEMP_EN,
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MAX30102_REG_TEMP_CONFIG_TEMP_EN);
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if (ret)
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return ret;
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msleep(35);
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return max30102_read_temp(data, val);
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}
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static int max30102_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max30102_data *data = iio_priv(indio_dev);
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int ret = -EINVAL;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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/*
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* Temperature reading can only be acquired while engine
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* is running
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*/
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mutex_lock(&indio_dev->mlock);
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if (!iio_buffer_enabled(indio_dev))
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ret = -EBUSY;
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else {
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ret = max30102_get_temp(data, val);
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if (!ret)
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ret = IIO_VAL_INT;
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}
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mutex_unlock(&indio_dev->mlock);
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break;
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case IIO_CHAN_INFO_SCALE:
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*val = 1; /* 0.0625 */
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*val2 = 16;
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ret = IIO_VAL_FRACTIONAL;
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break;
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}
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return ret;
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}
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static const struct iio_info max30102_info = {
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.read_raw = max30102_read_raw,
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};
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static int max30102_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct max30102_data *data;
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struct iio_buffer *buffer;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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buffer = devm_iio_kfifo_allocate(&client->dev);
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if (!buffer)
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return -ENOMEM;
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iio_device_attach_buffer(indio_dev, buffer);
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indio_dev->name = MAX30102_DRV_NAME;
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indio_dev->channels = max30102_channels;
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indio_dev->info = &max30102_info;
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indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
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indio_dev->available_scan_masks = max30102_scan_masks;
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indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
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indio_dev->setup_ops = &max30102_buffer_setup_ops;
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indio_dev->dev.parent = &client->dev;
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data = iio_priv(indio_dev);
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data->indio_dev = indio_dev;
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data->client = client;
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mutex_init(&data->lock);
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i2c_set_clientdata(client, indio_dev);
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data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
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if (IS_ERR(data->regmap)) {
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dev_err(&client->dev, "regmap initialization failed\n");
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return PTR_ERR(data->regmap);
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}
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max30102_set_powermode(data, false);
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ret = max30102_chip_init(data);
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if (ret)
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return ret;
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if (client->irq <= 0) {
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dev_err(&client->dev, "no valid irq defined\n");
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return -EINVAL;
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}
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ret = devm_request_threaded_irq(&client->dev, client->irq,
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NULL, max30102_interrupt_handler,
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IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
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"max30102_irq", indio_dev);
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if (ret) {
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dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
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return ret;
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}
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return iio_device_register(indio_dev);
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}
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static int max30102_remove(struct i2c_client *client)
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{
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struct iio_dev *indio_dev = i2c_get_clientdata(client);
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struct max30102_data *data = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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max30102_set_powermode(data, false);
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return 0;
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}
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static const struct i2c_device_id max30102_id[] = {
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{ "max30102", 0 },
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{}
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};
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MODULE_DEVICE_TABLE(i2c, max30102_id);
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static const struct of_device_id max30102_dt_ids[] = {
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{ .compatible = "maxim,max30102" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, max30102_dt_ids);
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static struct i2c_driver max30102_driver = {
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.driver = {
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.name = MAX30102_DRV_NAME,
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.of_match_table = of_match_ptr(max30102_dt_ids),
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},
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.probe = max30102_probe,
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.remove = max30102_remove,
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.id_table = max30102_id,
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};
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module_i2c_driver(max30102_driver);
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MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
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MODULE_DESCRIPTION("MAX30102 heart rate and pulse oximeter sensor");
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MODULE_LICENSE("GPL");
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