mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 15:43:59 +08:00
7a38d450b6
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
412 lines
9.1 KiB
Plaintext
412 lines
9.1 KiB
Plaintext
/*
|
|
* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
|
|
* applies to AT91SAM9G45, AT91SAM9M10,
|
|
* AT91SAM9G46, AT91SAM9M11 SoC
|
|
*
|
|
* Copyright (C) 2011 Atmel,
|
|
* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
|
|
*
|
|
* Licensed under GPLv2 or later.
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
model = "Atmel AT91SAM9G45 family SoC";
|
|
compatible = "atmel,at91sam9g45";
|
|
interrupt-parent = <&aic>;
|
|
|
|
aliases {
|
|
serial0 = &dbgu;
|
|
serial1 = &usart0;
|
|
serial2 = &usart1;
|
|
serial3 = &usart2;
|
|
serial4 = &usart3;
|
|
gpio0 = &pioA;
|
|
gpio1 = &pioB;
|
|
gpio2 = &pioC;
|
|
gpio3 = &pioD;
|
|
gpio4 = &pioE;
|
|
tcb0 = &tcb0;
|
|
tcb1 = &tcb1;
|
|
i2c0 = &i2c0;
|
|
i2c1 = &i2c1;
|
|
};
|
|
cpus {
|
|
cpu@0 {
|
|
compatible = "arm,arm926ejs";
|
|
};
|
|
};
|
|
|
|
memory {
|
|
reg = <0x70000000 0x10000000>;
|
|
};
|
|
|
|
ahb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
apb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
aic: interrupt-controller@fffff000 {
|
|
#interrupt-cells = <3>;
|
|
compatible = "atmel,at91rm9200-aic";
|
|
interrupt-controller;
|
|
reg = <0xfffff000 0x200>;
|
|
atmel,external-irqs = <31>;
|
|
};
|
|
|
|
ramc0: ramc@ffffe400 {
|
|
compatible = "atmel,at91sam9g45-ddramc";
|
|
reg = <0xffffe400 0x200
|
|
0xffffe600 0x200>;
|
|
};
|
|
|
|
pmc: pmc@fffffc00 {
|
|
compatible = "atmel,at91rm9200-pmc";
|
|
reg = <0xfffffc00 0x100>;
|
|
};
|
|
|
|
rstc@fffffd00 {
|
|
compatible = "atmel,at91sam9g45-rstc";
|
|
reg = <0xfffffd00 0x10>;
|
|
};
|
|
|
|
pit: timer@fffffd30 {
|
|
compatible = "atmel,at91sam9260-pit";
|
|
reg = <0xfffffd30 0xf>;
|
|
interrupts = <1 4 7>;
|
|
};
|
|
|
|
|
|
shdwc@fffffd10 {
|
|
compatible = "atmel,at91sam9rl-shdwc";
|
|
reg = <0xfffffd10 0x10>;
|
|
};
|
|
|
|
tcb0: timer@fff7c000 {
|
|
compatible = "atmel,at91rm9200-tcb";
|
|
reg = <0xfff7c000 0x100>;
|
|
interrupts = <18 4 0>;
|
|
};
|
|
|
|
tcb1: timer@fffd4000 {
|
|
compatible = "atmel,at91rm9200-tcb";
|
|
reg = <0xfffd4000 0x100>;
|
|
interrupts = <18 4 0>;
|
|
};
|
|
|
|
dma: dma-controller@ffffec00 {
|
|
compatible = "atmel,at91sam9g45-dma";
|
|
reg = <0xffffec00 0x200>;
|
|
interrupts = <21 4 0>;
|
|
};
|
|
|
|
pinctrl@fffff200 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
|
ranges = <0xfffff200 0xfffff200 0xa00>;
|
|
|
|
atmel,mux-mask = <
|
|
/* A B */
|
|
0xffffffff 0xffc003ff /* pioA */
|
|
0xffffffff 0x800f8f00 /* pioB */
|
|
0xffffffff 0x00000e00 /* pioC */
|
|
0xffffffff 0xff0c1381 /* pioD */
|
|
0xffffffff 0x81ffff81 /* pioE */
|
|
>;
|
|
|
|
/* shared pinctrl settings */
|
|
dbgu {
|
|
pinctrl_dbgu: dbgu-0 {
|
|
atmel,pins =
|
|
<1 12 0x1 0x0 /* PB12 periph A */
|
|
1 13 0x1 0x0>; /* PB13 periph A */
|
|
};
|
|
};
|
|
|
|
uart0 {
|
|
pinctrl_uart0: uart0-0 {
|
|
atmel,pins =
|
|
<1 19 0x1 0x1 /* PB19 periph A with pullup */
|
|
1 18 0x1 0x0>; /* PB18 periph A */
|
|
};
|
|
|
|
pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
|
|
atmel,pins =
|
|
<1 17 0x2 0x0 /* PB17 periph B */
|
|
1 15 0x2 0x0>; /* PB15 periph B */
|
|
};
|
|
};
|
|
|
|
uart1 {
|
|
pinctrl_uart1: uart1-0 {
|
|
atmel,pins =
|
|
<1 4 0x1 0x1 /* PB4 periph A with pullup */
|
|
1 5 0x1 0x0>; /* PB5 periph A */
|
|
};
|
|
|
|
pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
|
|
atmel,pins =
|
|
<3 16 0x1 0x0 /* PD16 periph A */
|
|
3 17 0x1 0x0>; /* PD17 periph A */
|
|
};
|
|
};
|
|
|
|
uart2 {
|
|
pinctrl_uart2: uart2-0 {
|
|
atmel,pins =
|
|
<1 6 0x1 0x1 /* PB6 periph A with pullup */
|
|
1 7 0x1 0x0>; /* PB7 periph A */
|
|
};
|
|
|
|
pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
|
|
atmel,pins =
|
|
<2 9 0x2 0x0 /* PC9 periph B */
|
|
2 11 0x2 0x0>; /* PC11 periph B */
|
|
};
|
|
};
|
|
|
|
uart3 {
|
|
pinctrl_uart3: uart3-0 {
|
|
atmel,pins =
|
|
<1 8 0x1 0x1 /* PB9 periph A with pullup */
|
|
1 9 0x1 0x0>; /* PB8 periph A */
|
|
};
|
|
|
|
pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
|
|
atmel,pins =
|
|
<0 23 0x2 0x0 /* PA23 periph B */
|
|
0 24 0x2 0x0>; /* PA24 periph B */
|
|
};
|
|
};
|
|
|
|
nand {
|
|
pinctrl_nand: nand-0 {
|
|
atmel,pins =
|
|
<2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
|
|
2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
|
|
};
|
|
};
|
|
|
|
pioA: gpio@fffff200 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff200 0x200>;
|
|
interrupts = <2 4 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pioB: gpio@fffff400 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff400 0x200>;
|
|
interrupts = <3 4 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pioC: gpio@fffff600 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff600 0x200>;
|
|
interrupts = <4 4 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pioD: gpio@fffff800 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffff800 0x200>;
|
|
interrupts = <5 4 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pioE: gpio@fffffa00 {
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
reg = <0xfffffa00 0x200>;
|
|
interrupts = <5 4 1>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
};
|
|
|
|
dbgu: serial@ffffee00 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xffffee00 0x200>;
|
|
interrupts = <1 4 7>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_dbgu>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart0: serial@fff8c000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfff8c000 0x200>;
|
|
interrupts = <7 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart1: serial@fff90000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfff90000 0x200>;
|
|
interrupts = <8 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart2: serial@fff94000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfff94000 0x200>;
|
|
interrupts = <9 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usart3: serial@fff98000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfff98000 0x200>;
|
|
interrupts = <10 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
macb0: ethernet@fffbc000 {
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
reg = <0xfffbc000 0x100>;
|
|
interrupts = <25 4 3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@fff84000 {
|
|
compatible = "atmel,at91sam9g10-i2c";
|
|
reg = <0xfff84000 0x100>;
|
|
interrupts = <12 4 6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@fff88000 {
|
|
compatible = "atmel,at91sam9g10-i2c";
|
|
reg = <0xfff88000 0x100>;
|
|
interrupts = <13 4 6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc0: adc@fffb0000 {
|
|
compatible = "atmel,at91sam9260-adc";
|
|
reg = <0xfffb0000 0x100>;
|
|
interrupts = <20 4 0>;
|
|
atmel,adc-use-external-triggers;
|
|
atmel,adc-channels-used = <0xff>;
|
|
atmel,adc-vref = <3300>;
|
|
atmel,adc-num-channels = <8>;
|
|
atmel,adc-startup-time = <40>;
|
|
atmel,adc-channel-base = <0x30>;
|
|
atmel,adc-drdy-mask = <0x10000>;
|
|
atmel,adc-status-register = <0x1c>;
|
|
atmel,adc-trigger-register = <0x08>;
|
|
|
|
trigger@0 {
|
|
trigger-name = "external-rising";
|
|
trigger-value = <0x1>;
|
|
trigger-external;
|
|
};
|
|
trigger@1 {
|
|
trigger-name = "external-falling";
|
|
trigger-value = <0x2>;
|
|
trigger-external;
|
|
};
|
|
|
|
trigger@2 {
|
|
trigger-name = "external-any";
|
|
trigger-value = <0x3>;
|
|
trigger-external;
|
|
};
|
|
|
|
trigger@3 {
|
|
trigger-name = "continuous";
|
|
trigger-value = <0x6>;
|
|
};
|
|
};
|
|
};
|
|
|
|
nand0: nand@40000000 {
|
|
compatible = "atmel,at91rm9200-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x40000000 0x10000000
|
|
0xffffe200 0x200
|
|
>;
|
|
atmel,nand-addr-offset = <21>;
|
|
atmel,nand-cmd-offset = <22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
gpios = <&pioC 8 0
|
|
&pioC 14 0
|
|
0
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: ohci@00700000 {
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
reg = <0x00700000 0x100000>;
|
|
interrupts = <22 4 2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: ehci@00800000 {
|
|
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
|
reg = <0x00800000 0x100000>;
|
|
interrupts = <22 4 2>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2c@0 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioA 20 0 /* sda */
|
|
&pioA 21 0 /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <5>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|