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https://github.com/edk2-porting/linux-next.git
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c8806b6c9e
Cisco has developed a new PCI HBA interface called sNIC, which stands for SCSI NIC. This is a new storage feature supported on specialized network adapter. The new PCI function provides a uniform host interface and abstracts backend storage. [jejb: fix up checkpatch errors] Signed-off-by: Narsimhulu Musini <nmusini@cisco.com> Signed-off-by: Sesidhar Baddela <sebaddel@cisco.com> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: James Bottomley <JBottomley@Odin.com>
78 lines
2.4 KiB
C
78 lines
2.4 KiB
C
/*
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* Copyright 2014 Cisco Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _CQ_DESC_H_
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#define _CQ_DESC_H_
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/*
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* Completion queue descriptor types
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*/
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enum cq_desc_types {
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CQ_DESC_TYPE_WQ_ENET = 0,
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CQ_DESC_TYPE_DESC_COPY = 1,
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CQ_DESC_TYPE_WQ_EXCH = 2,
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CQ_DESC_TYPE_RQ_ENET = 3,
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CQ_DESC_TYPE_RQ_FCP = 4,
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};
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/* Completion queue descriptor: 16B
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*
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* All completion queues have this basic layout. The
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* type_specific area is unique for each completion
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* queue type.
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*/
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struct cq_desc {
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__le16 completed_index;
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__le16 q_number;
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u8 type_specific[11];
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u8 type_color;
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};
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#define CQ_DESC_TYPE_BITS 4
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#define CQ_DESC_TYPE_MASK ((1 << CQ_DESC_TYPE_BITS) - 1)
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#define CQ_DESC_COLOR_MASK 1
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#define CQ_DESC_COLOR_SHIFT 7
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#define CQ_DESC_Q_NUM_BITS 10
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#define CQ_DESC_Q_NUM_MASK ((1 << CQ_DESC_Q_NUM_BITS) - 1)
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#define CQ_DESC_COMP_NDX_BITS 12
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#define CQ_DESC_COMP_NDX_MASK ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
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static inline void cq_desc_dec(const struct cq_desc *desc_arg,
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u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
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{
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const struct cq_desc *desc = desc_arg;
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const u8 type_color = desc->type_color;
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*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
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/*
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* Make sure color bit is read from desc *before* other fields
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* are read from desc. Hardware guarantees color bit is last
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* bit (byte) written. Adding the rmb() prevents the compiler
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* and/or CPU from reordering the reads which would potentially
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* result in reading stale values.
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*/
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rmb();
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*type = type_color & CQ_DESC_TYPE_MASK;
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*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
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*completed_index = le16_to_cpu(desc->completed_index) &
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CQ_DESC_COMP_NDX_MASK;
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}
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#endif /* _CQ_DESC_H_ */
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