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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-24 05:04:00 +08:00
linux-next/arch/openrisc
Linus Torvalds eea3a00264 Merge branch 'akpm' (patches from Andrew)
Merge second patchbomb from Andrew Morton:

 - the rest of MM

 - various misc bits

 - add ability to run /sbin/reboot at reboot time

 - printk/vsprintf changes

 - fiddle with seq_printf() return value

* akpm: (114 commits)
  parisc: remove use of seq_printf return value
  lru_cache: remove use of seq_printf return value
  tracing: remove use of seq_printf return value
  cgroup: remove use of seq_printf return value
  proc: remove use of seq_printf return value
  s390: remove use of seq_printf return value
  cris fasttimer: remove use of seq_printf return value
  cris: remove use of seq_printf return value
  openrisc: remove use of seq_printf return value
  ARM: plat-pxa: remove use of seq_printf return value
  nios2: cpuinfo: remove use of seq_printf return value
  microblaze: mb: remove use of seq_printf return value
  ipc: remove use of seq_printf return value
  rtc: remove use of seq_printf return value
  power: wakeup: remove use of seq_printf return value
  x86: mtrr: if: remove use of seq_printf return value
  linux/bitmap.h: improve BITMAP_{LAST,FIRST}_WORD_MASK
  MAINTAINERS: CREDITS: remove Stefano Brivio from B43
  .mailmap: add Ricardo Ribalda
  CREDITS: add Ricardo Ribalda Delgado
  ...
2015-04-15 16:39:15 -07:00
..
boot/dts openrisc: use new common dtc rule 2012-12-03 17:17:48 -06:00
configs openrisc: Refresh or1ksim_defconfig for v3.12 2013-11-15 10:37:32 +01:00
include arch: Remove exec_domain from remaining archs 2015-04-12 21:03:30 +02:00
kernel Merge branch 'akpm' (patches from Andrew) 2015-04-15 16:39:15 -07:00
lib ARCH: drivers remove __dev* attributes. 2013-01-03 15:57:13 -08:00
mm vm: add VM_FAULT_SIGSEGV handling support 2015-01-29 10:51:32 -08:00
Kconfig openrisc: Convert handle_IRQ to use __handle_domain_irq 2014-09-03 13:10:19 +00:00
Makefile openrisc: Makefile: append "-D__linux__" to KBUILD_CFLAGS 2013-11-05 16:14:47 +01:00
README.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00
TODO.openrisc OpenRISC: Miscellaneous 2011-07-22 18:46:41 +02:00

OpenRISC Linux
==============

This is a port of Linux to the OpenRISC class of microprocessors; the initial
target architecture, specifically, is the 32-bit OpenRISC 1000 family (or1k).

For information about OpenRISC processors and ongoing development:

	website		http://openrisc.net

For more information about Linux on OpenRISC, please contact South Pole AB.

	email:		info@southpole.se

	website:	http://southpole.se
			http://southpoleconsulting.com

---------------------------------------------------------------------

Build instructions for OpenRISC toolchain and Linux
===================================================

In order to build and run Linux for OpenRISC, you'll need at least a basic
toolchain and, perhaps, the architectural simulator.  Steps to get these bits
in place are outlined here.

1)  The toolchain can be obtained from openrisc.net.  Instructions for building
a toolchain can be found at:

http://openrisc.net/toolchain-build.html

2) or1ksim (optional)

or1ksim is the architectural simulator which will allow you to actually run
your OpenRISC Linux kernel if you don't have an OpenRISC processor at hand.

	git clone git://openrisc.net/jonas/or1ksim-svn

	cd or1ksim
	./configure --prefix=$OPENRISC_PREFIX
	make
	make install

3)  Linux kernel

Build the kernel as usual

	make ARCH=openrisc defconfig
	make ARCH=openrisc

4)  Run in architectural simulator

Grab the or1ksim platform configuration file (from the or1ksim source) and
together with your freshly built vmlinux, run your kernel with the following
incantation:

	sim -f arch/openrisc/or1ksim.cfg vmlinux

---------------------------------------------------------------------

Terminology
===========

In the code, the following particles are used on symbols to limit the scope
to more or less specific processor implementations:

openrisc: the OpenRISC class of processors
or1k:     the OpenRISC 1000 family of processors
or1200:   the OpenRISC 1200 processor

---------------------------------------------------------------------

History
========

18. 11. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	initial port of linux to OpenRISC/or32 architecture.
        all the core stuff is implemented and seams usable.

08. 12. 2003	Matjaz Breskvar (phoenix@bsemi.com)
	complete change of TLB miss handling.
	rewrite of exceptions handling.
	fully functional sash-3.6 in default initrd.
	a much improved version with changes all around.

10. 04. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	alot of bugfixes all over.
	ethernet support, functional http and telnet servers.
	running many standard linux apps.

26. 06. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	port to 2.6.x

30. 11. 2004	Matjaz Breskvar (phoenix@bsemi.com)
	lots of bugfixes and enhancments.
	added opencores framebuffer driver.

09. 10. 2010    Jonas Bonn (jonas@southpole.se)
	major rewrite to bring up to par with upstream Linux 2.6.36