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7c2fcccc32
Add support for RPDNEN, NSHHPEN, BRIDGOFF, CPWMEN and PNDLSL, and add DT bindings to access them. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
239 lines
6.5 KiB
C
239 lines
6.5 KiB
C
/*
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* Codec driver for ST STA350 2.1-channel high-efficiency digital audio system
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*
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* Copyright: 2011 Raumfeld GmbH
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* Author: Sven Brandau <info@brandau.biz>
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*
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* based on code from:
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* Raumfeld GmbH
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* Johannes Stezenbach <js@sig21.net>
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* Wolfson Microelectronics PLC.
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* Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef _ASOC_STA_350_H
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#define _ASOC_STA_350_H
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/* STA50 register addresses */
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#define STA350_REGISTER_COUNT 0x4D
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#define STA350_COEF_COUNT 62
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#define STA350_CONFA 0x00
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#define STA350_CONFB 0x01
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#define STA350_CONFC 0x02
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#define STA350_CONFD 0x03
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#define STA350_CONFE 0x04
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#define STA350_CONFF 0x05
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#define STA350_MMUTE 0x06
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#define STA350_MVOL 0x07
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#define STA350_C1VOL 0x08
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#define STA350_C2VOL 0x09
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#define STA350_C3VOL 0x0a
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#define STA350_AUTO1 0x0b
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#define STA350_AUTO2 0x0c
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#define STA350_AUTO3 0x0d
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#define STA350_C1CFG 0x0e
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#define STA350_C2CFG 0x0f
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#define STA350_C3CFG 0x10
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#define STA350_TONE 0x11
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#define STA350_L1AR 0x12
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#define STA350_L1ATRT 0x13
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#define STA350_L2AR 0x14
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#define STA350_L2ATRT 0x15
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#define STA350_CFADDR2 0x16
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#define STA350_B1CF1 0x17
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#define STA350_B1CF2 0x18
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#define STA350_B1CF3 0x19
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#define STA350_B2CF1 0x1a
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#define STA350_B2CF2 0x1b
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#define STA350_B2CF3 0x1c
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#define STA350_A1CF1 0x1d
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#define STA350_A1CF2 0x1e
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#define STA350_A1CF3 0x1f
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#define STA350_A2CF1 0x20
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#define STA350_A2CF2 0x21
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#define STA350_A2CF3 0x22
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#define STA350_B0CF1 0x23
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#define STA350_B0CF2 0x24
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#define STA350_B0CF3 0x25
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#define STA350_CFUD 0x26
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#define STA350_MPCC1 0x27
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#define STA350_MPCC2 0x28
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#define STA350_DCC1 0x29
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#define STA350_DCC2 0x2a
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#define STA350_FDRC1 0x2b
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#define STA350_FDRC2 0x2c
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#define STA350_STATUS 0x2d
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/* reserved: 0x2d - 0x30 */
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#define STA350_EQCFG 0x31
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#define STA350_EATH1 0x32
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#define STA350_ERTH1 0x33
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#define STA350_EATH2 0x34
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#define STA350_ERTH2 0x35
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#define STA350_CONFX 0x36
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#define STA350_SVCA 0x37
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#define STA350_SVCB 0x38
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#define STA350_RMS0A 0x39
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#define STA350_RMS0B 0x3a
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#define STA350_RMS0C 0x3b
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#define STA350_RMS1A 0x3c
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#define STA350_RMS1B 0x3d
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#define STA350_RMS1C 0x3e
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#define STA350_EVOLRES 0x3f
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/* reserved: 0x40 - 0x47 */
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#define STA350_NSHAPE 0x48
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#define STA350_CTXB4B1 0x49
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#define STA350_CTXB7B5 0x4a
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#define STA350_MISC1 0x4b
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#define STA350_MISC2 0x4c
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/* 0x00 CONFA */
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#define STA350_CONFA_MCS_MASK 0x03
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#define STA350_CONFA_MCS_SHIFT 0
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#define STA350_CONFA_IR_MASK 0x18
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#define STA350_CONFA_IR_SHIFT 3
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#define STA350_CONFA_TWRB BIT(5)
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#define STA350_CONFA_TWAB BIT(6)
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#define STA350_CONFA_FDRB BIT(7)
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/* 0x01 CONFB */
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#define STA350_CONFB_SAI_MASK 0x0f
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#define STA350_CONFB_SAI_SHIFT 0
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#define STA350_CONFB_SAIFB BIT(4)
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#define STA350_CONFB_DSCKE BIT(5)
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#define STA350_CONFB_C1IM BIT(6)
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#define STA350_CONFB_C2IM BIT(7)
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/* 0x02 CONFC */
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#define STA350_CONFC_OM_MASK 0x03
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#define STA350_CONFC_OM_SHIFT 0
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#define STA350_CONFC_CSZ_MASK 0x3c
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#define STA350_CONFC_CSZ_SHIFT 2
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#define STA350_CONFC_OCRB BIT(7)
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/* 0x03 CONFD */
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#define STA350_CONFD_HPB_SHIFT 0
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#define STA350_CONFD_DEMP_SHIFT 1
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#define STA350_CONFD_DSPB_SHIFT 2
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#define STA350_CONFD_PSL_SHIFT 3
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#define STA350_CONFD_BQL_SHIFT 4
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#define STA350_CONFD_DRC_SHIFT 5
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#define STA350_CONFD_ZDE_SHIFT 6
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#define STA350_CONFD_SME_SHIFT 7
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/* 0x04 CONFE */
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#define STA350_CONFE_MPCV BIT(0)
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#define STA350_CONFE_MPCV_SHIFT 0
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#define STA350_CONFE_MPC BIT(1)
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#define STA350_CONFE_MPC_SHIFT 1
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#define STA350_CONFE_NSBW BIT(2)
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#define STA350_CONFE_NSBW_SHIFT 2
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#define STA350_CONFE_AME BIT(3)
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#define STA350_CONFE_AME_SHIFT 3
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#define STA350_CONFE_PWMS BIT(4)
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#define STA350_CONFE_PWMS_SHIFT 4
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#define STA350_CONFE_DCCV BIT(5)
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#define STA350_CONFE_DCCV_SHIFT 5
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#define STA350_CONFE_ZCE BIT(6)
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#define STA350_CONFE_ZCE_SHIFT 6
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#define STA350_CONFE_SVE BIT(7)
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#define STA350_CONFE_SVE_SHIFT 7
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/* 0x05 CONFF */
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#define STA350_CONFF_OCFG_MASK 0x03
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#define STA350_CONFF_OCFG_SHIFT 0
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#define STA350_CONFF_IDE BIT(2)
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#define STA350_CONFF_BCLE BIT(3)
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#define STA350_CONFF_LDTE BIT(4)
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#define STA350_CONFF_ECLE BIT(5)
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#define STA350_CONFF_PWDN BIT(6)
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#define STA350_CONFF_EAPD BIT(7)
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/* 0x06 MMUTE */
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#define STA350_MMUTE_MMUTE 0x01
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#define STA350_MMUTE_MMUTE_SHIFT 0
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#define STA350_MMUTE_C1M 0x02
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#define STA350_MMUTE_C1M_SHIFT 1
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#define STA350_MMUTE_C2M 0x04
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#define STA350_MMUTE_C2M_SHIFT 2
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#define STA350_MMUTE_C3M 0x08
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#define STA350_MMUTE_C3M_SHIFT 3
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#define STA350_MMUTE_LOC_MASK 0xC0
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#define STA350_MMUTE_LOC_SHIFT 6
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/* 0x0b AUTO1 */
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#define STA350_AUTO1_AMGC_MASK 0x30
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#define STA350_AUTO1_AMGC_SHIFT 4
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/* 0x0c AUTO2 */
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#define STA350_AUTO2_AMAME 0x01
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#define STA350_AUTO2_AMAM_MASK 0x0e
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#define STA350_AUTO2_AMAM_SHIFT 1
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#define STA350_AUTO2_XO_MASK 0xf0
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#define STA350_AUTO2_XO_SHIFT 4
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/* 0x0d AUTO3 */
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#define STA350_AUTO3_PEQ_MASK 0x1f
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#define STA350_AUTO3_PEQ_SHIFT 0
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/* 0x0e 0x0f 0x10 CxCFG */
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#define STA350_CxCFG_TCB_SHIFT 0
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#define STA350_CxCFG_EQBP_SHIFT 1
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#define STA350_CxCFG_VBP_SHIFT 2
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#define STA350_CxCFG_BO_SHIFT 3
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#define STA350_CxCFG_LS_SHIFT 4
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#define STA350_CxCFG_OM_MASK 0xc0
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#define STA350_CxCFG_OM_SHIFT 6
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/* 0x11 TONE */
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#define STA350_TONE_BTC_SHIFT 0
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#define STA350_TONE_TTC_SHIFT 4
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/* 0x12 0x13 0x14 0x15 limiter attack/release */
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#define STA350_LxA_SHIFT 0
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#define STA350_LxR_SHIFT 4
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/* 0x26 CFUD */
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#define STA350_CFUD_W1 0x01
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#define STA350_CFUD_WA 0x02
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#define STA350_CFUD_R1 0x04
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#define STA350_CFUD_RA 0x08
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/* biquad filter coefficient table offsets */
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#define STA350_C1_BQ_BASE 0
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#define STA350_C2_BQ_BASE 20
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#define STA350_CH_BQ_NUM 4
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#define STA350_BQ_NUM_COEF 5
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#define STA350_XO_HP_BQ_BASE 40
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#define STA350_XO_LP_BQ_BASE 45
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#define STA350_C1_PRESCALE 50
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#define STA350_C2_PRESCALE 51
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#define STA350_C1_POSTSCALE 52
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#define STA350_C2_POSTSCALE 53
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#define STA350_C3_POSTSCALE 54
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#define STA350_TW_POSTSCALE 55
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#define STA350_C1_MIX1 56
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#define STA350_C1_MIX2 57
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#define STA350_C2_MIX1 58
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#define STA350_C2_MIX2 59
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#define STA350_C3_MIX1 60
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#define STA350_C3_MIX2 61
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/* miscellaneous register 1 */
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#define STA350_MISC1_CPWMEN BIT(2)
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#define STA350_MISC1_BRIDGOFF BIT(5)
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#define STA350_MISC1_NSHHPEN BIT(6)
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#define STA350_MISC1_RPDNEN BIT(7)
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/* miscellaneous register 2 */
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#define STA350_MISC2_PNDLSL_MASK 0x1c
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#define STA350_MISC2_PNDLSL_SHIFT 2
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#endif /* _ASOC_STA_350_H */
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