mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-25 13:43:55 +08:00
785e3268e2
This patch attempts to modernize core Alchemy interrupt handling code. - add irq_chips for irq controllers instead of irq type, - add a set_type() hook to change irq trigger type during runtime, - add a set_wake() hook to control GPIO0..7 based wakeup, - use linux' IRQF_TRIGGER_ constants instead of homebrew ones, - enable GENERIC_HARDIRQS_NO__DO_IRQ. - simplify plat_irq_dispatch - merge au1xxx_irqmap into irq.c file, the only place where its contents are referenced. - board_init_irq() is now mandatory for every board; use it to register the remaining (gpio-based) interrupt sources; update all boards accordingly. Run-tested on Db1200 and other Au1200 based platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
138 lines
2.7 KiB
Plaintext
138 lines
2.7 KiB
Plaintext
choice
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prompt "Machine type"
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depends on MACH_ALCHEMY
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default MIPS_DB1000
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config MIPS_MTX1
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bool "4G Systems MTX-1 board"
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select SOC_AU1500
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_BOSPORUS
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bool "Alchemy Bosporus board"
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select SOC_AU1500
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select DMA_NONCOHERENT
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_DB1000
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bool "Alchemy DB1000 board"
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select SOC_AU1000
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_DB1100
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bool "Alchemy DB1100 board"
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select SOC_AU1100
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select DMA_NONCOHERENT
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_DB1200
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bool "Alchemy DB1200 board"
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select SOC_AU1200
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select DMA_COHERENT
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_DB1500
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bool "Alchemy DB1500 board"
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select SOC_AU1500
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_DB1550
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bool "Alchemy DB1550 board"
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select SOC_AU1550
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select HW_HAS_PCI
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select DMA_NONCOHERENT
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_MIRAGE
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bool "Alchemy Mirage board"
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select DMA_NONCOHERENT
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select SOC_AU1500
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_PB1000
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bool "Alchemy PB1000 board"
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select SOC_AU1000
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select SWAP_IO_SPACE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_PB1100
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bool "Alchemy PB1100 board"
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select SOC_AU1100
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select SWAP_IO_SPACE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_PB1200
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bool "Alchemy PB1200 board"
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select SOC_AU1200
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select DMA_NONCOHERENT
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_PB1500
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bool "Alchemy PB1500 board"
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select SOC_AU1500
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_PB1550
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bool "Alchemy PB1550 board"
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select SOC_AU1550
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select DMA_NONCOHERENT
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select HW_HAS_PCI
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select MIPS_DISABLE_OBSOLETE_IDE
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select SYS_SUPPORTS_LITTLE_ENDIAN
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config MIPS_XXS1500
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bool "MyCable XXS1500 board"
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select DMA_NONCOHERENT
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select SOC_AU1500
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select SYS_SUPPORTS_LITTLE_ENDIAN
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endchoice
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config SOC_AU1000
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bool
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select SOC_AU1X00
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config SOC_AU1100
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bool
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select SOC_AU1X00
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config SOC_AU1500
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bool
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select SOC_AU1X00
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config SOC_AU1550
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bool
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select SOC_AU1X00
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config SOC_AU1200
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bool
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select SOC_AU1X00
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config SOC_AU1X00
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bool
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select 64BIT_PHYS_ADDR
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select CEVT_R4K
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select CSRC_R4K
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select IRQ_CPU
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select SYS_HAS_CPU_MIPS32_R1
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_APM_EMULATION
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select GENERIC_HARDIRQS_NO__DO_IRQ
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