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8715466b60
AARGH64 uses ll/sc primitives that do not imply any barriers for the
normal atomics, therefore smp_mb__{before,after} should be a full
barrier.
Since AARGH64 doesn't use asm-generic/barrier.h, add the required
definitions to its asm/barrier.h.
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/n/tip-8p5iclqgy78al33kck3ht7nr@git.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chen Gang <gang.chen@asianux.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
107 lines
2.9 KiB
C
107 lines
2.9 KiB
C
/*
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* Based on arch/arm/include/asm/barrier.h
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_BARRIER_H
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#define __ASM_BARRIER_H
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#ifndef __ASSEMBLY__
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#define sev() asm volatile("sev" : : : "memory")
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#define wfe() asm volatile("wfe" : : : "memory")
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#define wfi() asm volatile("wfi" : : : "memory")
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#define isb() asm volatile("isb" : : : "memory")
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#define dmb(opt) asm volatile("dmb sy" : : : "memory")
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#define dsb(opt) asm volatile("dsb sy" : : : "memory")
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#define mb() dsb()
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#define rmb() asm volatile("dsb ld" : : : "memory")
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#define wmb() asm volatile("dsb st" : : : "memory")
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#ifndef CONFIG_SMP
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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smp_mb(); \
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ACCESS_ONCE(*p) = (v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = ACCESS_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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smp_mb(); \
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___p1; \
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})
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#else
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#define smp_mb() asm volatile("dmb ish" : : : "memory")
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#define smp_rmb() asm volatile("dmb ishld" : : : "memory")
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#define smp_wmb() asm volatile("dmb ishst" : : : "memory")
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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} \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1; \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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} \
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___p1; \
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})
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#endif
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#define read_barrier_depends() do { } while(0)
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#define smp_read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
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#define nop() asm volatile("nop");
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#define smp_mb__before_atomic() smp_mb()
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#define smp_mb__after_atomic() smp_mb()
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_BARRIER_H */
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