Dinh Nguyen 762d961aee clk: socfpga: stratix10: use new parent data scheme ... Convert, where possible, the stratix10 clock driver to the new parent data scheme by specifying the parent data for clocks that have multiple parents. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lkml.kernel.org/r/20200512181647.5071-1-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2020-05-26 19:13:05 -07:00
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clk-gate-a10.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-gate-s10.c	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00
clk-gate.c	clk: socfpga: deindent code to proper indentation	2019-08-16 10:20:07 -07:00
clk-periph-a10.c	clk: socfpga: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
clk-periph-s10.c	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00
clk-periph.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-pll-a10.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-pll-s10.c	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00
clk-pll.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-s10.c	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00
clk.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13	2019-05-21 11:28:45 +02:00
clk.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
Makefile	clk: socfpga: stratix10: add clock driver for Stratix10 platform	2018-04-06 10:12:35 -07:00
stratix10-clk.h	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00