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374ed9d18e
Commit d50240a5f6 ("arm64: mm: permit use of tagged pointers at EL0")
added support for tagged pointers in userspace, but the corresponding
update to Documentation/ contained some imprecise statements.
This patch fixes up some minor ambiguities in the text, hopefully making
it more clear about exactly what the kernel expects from user virtual
addresses.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
35 lines
1.5 KiB
Plaintext
35 lines
1.5 KiB
Plaintext
Tagged virtual addresses in AArch64 Linux
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=========================================
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Author: Will Deacon <will.deacon@arm.com>
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Date : 12 June 2013
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This document briefly describes the provision of tagged virtual
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addresses in the AArch64 translation system and their potential uses
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in AArch64 Linux.
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The kernel configures the translation tables so that translations made
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via TTBR0 (i.e. userspace mappings) have the top byte (bits 63:56) of
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the virtual address ignored by the translation hardware. This frees up
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this byte for application use, with the following caveats:
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(1) The kernel requires that all user addresses passed to EL1
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are tagged with tag 0x00. This means that any syscall
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parameters containing user virtual addresses *must* have
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their top byte cleared before trapping to the kernel.
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(2) Non-zero tags are not preserved when delivering signals.
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This means that signal handlers in applications making use
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of tags cannot rely on the tag information for user virtual
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addresses being maintained for fields inside siginfo_t.
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One exception to this rule is for signals raised in response
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to watchpoint debug exceptions, where the tag information
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will be preserved.
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(3) Special care should be taken when using tagged pointers,
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since it is likely that C compilers will not hazard two
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virtual addresses differing only in the upper byte.
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The architecture prevents the use of a tagged PC, so the upper byte will
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be set to a sign-extension of bit 55 on exception return.
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