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0a0661ddb8
This patch adds the required pieces to 8250-OMAP UART driver for DMA support. The TX burst size is set to 1 so we can send an arbitrary amount of bytes. The RX burst is currently set to 48 which means we receive an DMA interrupt every 48 bytes and have to reprogram everything. Less bytes in the RX-FIFO mean that no DMA transfer will happen and the UART will send a RX-timeout _or_ RDI event at which point the FIFO will be manually purged. There is a workaround for TX-DMA on AM33xx where we put the first byte into the FIFO to kick start the DMA process. Haven't seen this problem on OMAP36xx (beagle board xm) or DRA7xx. On AM375x there is "Usage Note 2.7: UART: Cannot Acknowledge Idle Requests in Smartidle Mode When Configured for DMA Operations" in the errata document. This problem persists even after disabling DMA in the UART and will be addressed in the HWMOD. v10: - delay update_registers() from set_termios() until TX-DMA is done. It has been reported / proved that invoking update_registers() while TX-DMA is in progress may stall the DMA operation and it won't finish. - use the new omap DMA-TX-RX hooks and DMA only interrupt routine. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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| .. | ||
| 8250_accent.c | ||
| 8250_acorn.c | ||
| 8250_boca.c | ||
| 8250_core.c | ||
| 8250_dma.c | ||
| 8250_dw.c | ||
| 8250_early.c | ||
| 8250_em.c | ||
| 8250_exar_st16c554.c | ||
| 8250_fintek.c | ||
| 8250_fourport.c | ||
| 8250_fsl.c | ||
| 8250_gsc.c | ||
| 8250_hp300.c | ||
| 8250_hub6.c | ||
| 8250_mtk.c | ||
| 8250_omap.c | ||
| 8250_pci.c | ||
| 8250_pnp.c | ||
| 8250.h | ||
| Kconfig | ||
| Makefile | ||
| serial_cs.c | ||