mirror of
https://github.com/edk2-porting/linux-next.git
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f64dcac0b1
Some SPI host drivers do not change chip select betwen transfers unless .cs_chnage field is explicitly set. The LCD spec requires chip select change between consecuitive transfers, so ensure it at the SPI driver level. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
477 lines
11 KiB
C
477 lines
11 KiB
C
/*
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* tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
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*
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* Copyright (C) 2008 Marvell International Ltd.
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* Eric Miao <eric.miao@marvell.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/tdo24m.h>
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#include <linux/fb.h>
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#include <linux/lcd.h>
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#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
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#define TDO24M_SPI_BUFF_SIZE (4)
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#define MODE_QVGA 0
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#define MODE_VGA 1
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struct tdo24m {
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struct spi_device *spi_dev;
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struct lcd_device *lcd_dev;
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struct spi_message msg;
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struct spi_transfer xfer;
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uint8_t *buf;
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int (*adj_mode)(struct tdo24m *lcd, int mode);
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int color_invert;
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int power;
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int mode;
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};
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/* use bit 30, 31 as the indicator of command parameter number */
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#define CMD0(x) ((0 << 30) | (x))
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#define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1))
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#define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\
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((x1) << 9) | 0x100 | (x2))
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#define CMD_NULL (-1)
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static uint32_t lcd_panel_reset[] = {
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CMD0(0x1), /* reset */
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CMD0(0x0), /* nop */
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CMD0(0x0), /* nop */
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CMD0(0x0), /* nop */
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CMD_NULL,
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};
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static uint32_t lcd_panel_on[] = {
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CMD0(0x29), /* Display ON */
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CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
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CMD0(0x11), /* Sleep out */
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CMD1(0xB0, 0x16), /* Wake */
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CMD_NULL,
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};
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static uint32_t lcd_panel_off[] = {
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CMD0(0x28), /* Display OFF */
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CMD2(0xB8, 0x80, 0x02), /* Output Control */
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CMD0(0x10), /* Sleep in */
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CMD1(0xB0, 0x00), /* Deep stand by in */
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CMD_NULL,
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};
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static uint32_t lcd_vga_pass_through_tdo24m[] = {
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CMD1(0xB0, 0x16),
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CMD1(0xBC, 0x80),
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CMD1(0xE1, 0x00),
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CMD1(0x36, 0x50),
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CMD1(0x3B, 0x00),
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CMD_NULL,
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};
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static uint32_t lcd_qvga_pass_through_tdo24m[] = {
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CMD1(0xB0, 0x16),
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CMD1(0xBC, 0x81),
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CMD1(0xE1, 0x00),
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CMD1(0x36, 0x50),
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CMD1(0x3B, 0x22),
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CMD_NULL,
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};
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static uint32_t lcd_vga_transfer_tdo24m[] = {
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CMD1(0xcf, 0x02), /* Blanking period control (1) */
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CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
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CMD1(0xd1, 0x01), /* CKV timing control on/off */
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CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
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CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
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CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
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CMD1(0xd5, 0x14), /* ASW timing control (2) */
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CMD0(0x21), /* Invert for normally black display */
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CMD0(0x29), /* Display on */
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CMD_NULL,
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};
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static uint32_t lcd_qvga_transfer[] = {
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CMD1(0xd6, 0x02), /* Blanking period control (1) */
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CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
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CMD1(0xd8, 0x01), /* CKV timing control on/off */
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CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
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CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
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CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
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CMD1(0xe0, 0x0a), /* ASW timing control (2) */
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CMD0(0x21), /* Invert for normally black display */
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CMD0(0x29), /* Display on */
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CMD_NULL,
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};
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static uint32_t lcd_vga_pass_through_tdo35s[] = {
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CMD1(0xB0, 0x16),
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CMD1(0xBC, 0x80),
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CMD1(0xE1, 0x00),
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CMD1(0x3B, 0x00),
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CMD_NULL,
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};
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static uint32_t lcd_qvga_pass_through_tdo35s[] = {
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CMD1(0xB0, 0x16),
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CMD1(0xBC, 0x81),
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CMD1(0xE1, 0x00),
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CMD1(0x3B, 0x22),
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CMD_NULL,
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};
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static uint32_t lcd_vga_transfer_tdo35s[] = {
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CMD1(0xcf, 0x02), /* Blanking period control (1) */
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CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
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CMD1(0xd1, 0x01), /* CKV timing control on/off */
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CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
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CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
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CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
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CMD1(0xd5, 0x28), /* ASW timing control (2) */
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CMD0(0x21), /* Invert for normally black display */
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CMD0(0x29), /* Display on */
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CMD_NULL,
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};
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static uint32_t lcd_panel_config[] = {
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CMD2(0xb8, 0xff, 0xf9), /* Output control */
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CMD0(0x11), /* sleep out */
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CMD1(0xba, 0x01), /* Display mode (1) */
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CMD1(0xbb, 0x00), /* Display mode (2) */
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CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
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CMD1(0xbf, 0x10), /* Drive system change control */
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CMD1(0xb1, 0x56), /* Booster operation setup */
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CMD1(0xb2, 0x33), /* Booster mode setup */
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CMD1(0xb3, 0x11), /* Booster frequency setup */
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CMD1(0xb4, 0x02), /* Op amp/system clock */
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CMD1(0xb5, 0x35), /* VCS voltage */
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CMD1(0xb6, 0x40), /* VCOM voltage */
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CMD1(0xb7, 0x03), /* External display signal */
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CMD1(0xbd, 0x00), /* ASW slew rate */
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CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
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CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
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CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
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CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
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CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
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CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
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CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
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CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
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CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
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CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
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CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
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CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
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CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
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CMD_NULL,
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};
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static int tdo24m_writes(struct tdo24m *lcd, uint32_t *array)
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{
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struct spi_transfer *x = &lcd->xfer;
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uint32_t data, *p = array;
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int nparams, err = 0;
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for (; *p != CMD_NULL; p++) {
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if (!lcd->color_invert && *p == CMD0(0x21))
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continue;
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nparams = (*p >> 30) & 0x3;
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data = *p << (7 - nparams);
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switch (nparams) {
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case 0:
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lcd->buf[0] = (data >> 8) & 0xff;
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lcd->buf[1] = data & 0xff;
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break;
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case 1:
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lcd->buf[0] = (data >> 16) & 0xff;
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lcd->buf[1] = (data >> 8) & 0xff;
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lcd->buf[2] = data & 0xff;
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break;
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case 2:
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lcd->buf[0] = (data >> 24) & 0xff;
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lcd->buf[1] = (data >> 16) & 0xff;
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lcd->buf[2] = (data >> 8) & 0xff;
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lcd->buf[3] = data & 0xff;
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break;
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default:
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continue;
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}
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x->len = nparams + 2;
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err = spi_sync(lcd->spi_dev, &lcd->msg);
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if (err)
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break;
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}
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return err;
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}
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static int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
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{
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switch (mode) {
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case MODE_VGA:
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tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
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tdo24m_writes(lcd, lcd_panel_config);
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tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
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break;
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case MODE_QVGA:
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tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
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tdo24m_writes(lcd, lcd_panel_config);
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tdo24m_writes(lcd, lcd_qvga_transfer);
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break;
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default:
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return -EINVAL;
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}
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lcd->mode = mode;
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return 0;
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}
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static int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
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{
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switch (mode) {
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case MODE_VGA:
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tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
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tdo24m_writes(lcd, lcd_panel_config);
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tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
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break;
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case MODE_QVGA:
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tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
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tdo24m_writes(lcd, lcd_panel_config);
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tdo24m_writes(lcd, lcd_qvga_transfer);
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break;
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default:
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return -EINVAL;
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}
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lcd->mode = mode;
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return 0;
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}
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static int tdo24m_power_on(struct tdo24m *lcd)
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{
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int err;
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err = tdo24m_writes(lcd, lcd_panel_on);
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if (err)
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goto out;
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err = tdo24m_writes(lcd, lcd_panel_reset);
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if (err)
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goto out;
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err = lcd->adj_mode(lcd, lcd->mode);
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out:
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return err;
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}
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static int tdo24m_power_off(struct tdo24m *lcd)
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{
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return tdo24m_writes(lcd, lcd_panel_off);
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}
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static int tdo24m_power(struct tdo24m *lcd, int power)
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{
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int ret = 0;
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if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
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ret = tdo24m_power_on(lcd);
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else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
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ret = tdo24m_power_off(lcd);
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if (!ret)
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lcd->power = power;
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return ret;
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}
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static int tdo24m_set_power(struct lcd_device *ld, int power)
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{
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struct tdo24m *lcd = lcd_get_data(ld);
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return tdo24m_power(lcd, power);
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}
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static int tdo24m_get_power(struct lcd_device *ld)
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{
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struct tdo24m *lcd = lcd_get_data(ld);
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return lcd->power;
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}
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static int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
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{
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struct tdo24m *lcd = lcd_get_data(ld);
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int mode = MODE_QVGA;
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if (m->xres == 640 || m->xres == 480)
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mode = MODE_VGA;
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if (lcd->mode == mode)
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return 0;
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return lcd->adj_mode(lcd, mode);
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}
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static struct lcd_ops tdo24m_ops = {
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.get_power = tdo24m_get_power,
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.set_power = tdo24m_set_power,
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.set_mode = tdo24m_set_mode,
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};
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static int __devinit tdo24m_probe(struct spi_device *spi)
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{
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struct tdo24m *lcd;
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struct spi_message *m;
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struct spi_transfer *x;
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struct tdo24m_platform_data *pdata;
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enum tdo24m_model model;
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int err;
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pdata = spi->dev.platform_data;
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if (pdata)
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model = pdata->model;
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else
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model = TDO24M;
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spi->bits_per_word = 8;
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spi->mode = SPI_MODE_3;
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err = spi_setup(spi);
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if (err)
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return err;
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lcd = kzalloc(sizeof(struct tdo24m), GFP_KERNEL);
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if (!lcd)
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return -ENOMEM;
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lcd->spi_dev = spi;
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lcd->power = FB_BLANK_POWERDOWN;
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lcd->mode = MODE_VGA; /* default to VGA */
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lcd->buf = kmalloc(TDO24M_SPI_BUFF_SIZE, GFP_KERNEL);
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if (lcd->buf == NULL) {
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kfree(lcd);
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return -ENOMEM;
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}
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m = &lcd->msg;
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x = &lcd->xfer;
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spi_message_init(m);
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x->cs_change = 1;
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x->tx_buf = &lcd->buf[0];
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spi_message_add_tail(x, m);
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switch (model) {
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case TDO24M:
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lcd->color_invert = 1;
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lcd->adj_mode = tdo24m_adj_mode;
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break;
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case TDO35S:
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lcd->adj_mode = tdo35s_adj_mode;
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lcd->color_invert = 0;
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break;
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default:
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dev_err(&spi->dev, "Unsupported model");
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goto out_free;
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}
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lcd->lcd_dev = lcd_device_register("tdo24m", &spi->dev,
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lcd, &tdo24m_ops);
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if (IS_ERR(lcd->lcd_dev)) {
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err = PTR_ERR(lcd->lcd_dev);
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goto out_free;
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}
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dev_set_drvdata(&spi->dev, lcd);
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err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
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if (err)
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goto out_unregister;
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return 0;
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out_unregister:
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lcd_device_unregister(lcd->lcd_dev);
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out_free:
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kfree(lcd->buf);
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kfree(lcd);
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return err;
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}
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static int __devexit tdo24m_remove(struct spi_device *spi)
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{
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struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
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tdo24m_power(lcd, FB_BLANK_POWERDOWN);
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lcd_device_unregister(lcd->lcd_dev);
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kfree(lcd->buf);
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kfree(lcd);
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return 0;
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}
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#ifdef CONFIG_PM
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static int tdo24m_suspend(struct spi_device *spi, pm_message_t state)
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{
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struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
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return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
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}
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static int tdo24m_resume(struct spi_device *spi)
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{
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struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
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return tdo24m_power(lcd, FB_BLANK_UNBLANK);
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}
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#else
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#define tdo24m_suspend NULL
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#define tdo24m_resume NULL
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#endif
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/* Power down all displays on reboot, poweroff or halt */
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static void tdo24m_shutdown(struct spi_device *spi)
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{
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struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
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tdo24m_power(lcd, FB_BLANK_POWERDOWN);
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}
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static struct spi_driver tdo24m_driver = {
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.driver = {
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.name = "tdo24m",
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.owner = THIS_MODULE,
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},
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.probe = tdo24m_probe,
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.remove = __devexit_p(tdo24m_remove),
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.shutdown = tdo24m_shutdown,
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.suspend = tdo24m_suspend,
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.resume = tdo24m_resume,
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};
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static int __init tdo24m_init(void)
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{
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return spi_register_driver(&tdo24m_driver);
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}
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module_init(tdo24m_init);
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static void __exit tdo24m_exit(void)
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{
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spi_unregister_driver(&tdo24m_driver);
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}
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module_exit(tdo24m_exit);
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MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
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MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("spi:tdo24m");
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