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c685841ee1
A new PLL (gpll4) is added on msm8974 PRO devices to support a faster sdc1 clock rate. Add support for this and the two new sdcc cal clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
25 lines
589 B
Plaintext
25 lines
589 B
Plaintext
Qualcomm Global Clock & Reset Controller Binding
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Required properties :
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- compatible : shall contain only one of the following:
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"qcom,gcc-apq8064"
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"qcom,gcc-msm8660"
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"qcom,gcc-msm8960"
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"qcom,gcc-msm8974"
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"qcom,gcc-msm8974pro"
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"qcom,gcc-msm8974pro-ac"
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- reg : shall contain base register location and length
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- #clock-cells : shall contain 1
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- #reset-cells : shall contain 1
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Example:
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clock-controller@900000 {
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compatible = "qcom,gcc-msm8960";
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reg = <0x900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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