mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-25 13:43:55 +08:00
37353491d1
This is used by the Rockchip clk driver, export it to allow that driver to be compiled as a module.. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20200914022225.23613-4-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
111 lines
2.7 KiB
C
111 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
/*
|
|
* Copyright (c) 2014 MundoReader S.L.
|
|
* Author: Heiko Stuebner <heiko@sntech.de>
|
|
*/
|
|
|
|
#include <linux/slab.h>
|
|
#include <linux/io.h>
|
|
#include <linux/reset-controller.h>
|
|
#include <linux/spinlock.h>
|
|
#include "clk.h"
|
|
|
|
struct rockchip_softrst {
|
|
struct reset_controller_dev rcdev;
|
|
void __iomem *reg_base;
|
|
int num_regs;
|
|
int num_per_reg;
|
|
u8 flags;
|
|
spinlock_t lock;
|
|
};
|
|
|
|
static int rockchip_softrst_assert(struct reset_controller_dev *rcdev,
|
|
unsigned long id)
|
|
{
|
|
struct rockchip_softrst *softrst = container_of(rcdev,
|
|
struct rockchip_softrst,
|
|
rcdev);
|
|
int bank = id / softrst->num_per_reg;
|
|
int offset = id % softrst->num_per_reg;
|
|
|
|
if (softrst->flags & ROCKCHIP_SOFTRST_HIWORD_MASK) {
|
|
writel(BIT(offset) | (BIT(offset) << 16),
|
|
softrst->reg_base + (bank * 4));
|
|
} else {
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
spin_lock_irqsave(&softrst->lock, flags);
|
|
|
|
reg = readl(softrst->reg_base + (bank * 4));
|
|
writel(reg | BIT(offset), softrst->reg_base + (bank * 4));
|
|
|
|
spin_unlock_irqrestore(&softrst->lock, flags);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rockchip_softrst_deassert(struct reset_controller_dev *rcdev,
|
|
unsigned long id)
|
|
{
|
|
struct rockchip_softrst *softrst = container_of(rcdev,
|
|
struct rockchip_softrst,
|
|
rcdev);
|
|
int bank = id / softrst->num_per_reg;
|
|
int offset = id % softrst->num_per_reg;
|
|
|
|
if (softrst->flags & ROCKCHIP_SOFTRST_HIWORD_MASK) {
|
|
writel((BIT(offset) << 16), softrst->reg_base + (bank * 4));
|
|
} else {
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
spin_lock_irqsave(&softrst->lock, flags);
|
|
|
|
reg = readl(softrst->reg_base + (bank * 4));
|
|
writel(reg & ~BIT(offset), softrst->reg_base + (bank * 4));
|
|
|
|
spin_unlock_irqrestore(&softrst->lock, flags);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct reset_control_ops rockchip_softrst_ops = {
|
|
.assert = rockchip_softrst_assert,
|
|
.deassert = rockchip_softrst_deassert,
|
|
};
|
|
|
|
void rockchip_register_softrst(struct device_node *np,
|
|
unsigned int num_regs,
|
|
void __iomem *base, u8 flags)
|
|
{
|
|
struct rockchip_softrst *softrst;
|
|
int ret;
|
|
|
|
softrst = kzalloc(sizeof(*softrst), GFP_KERNEL);
|
|
if (!softrst)
|
|
return;
|
|
|
|
spin_lock_init(&softrst->lock);
|
|
|
|
softrst->reg_base = base;
|
|
softrst->flags = flags;
|
|
softrst->num_regs = num_regs;
|
|
softrst->num_per_reg = (flags & ROCKCHIP_SOFTRST_HIWORD_MASK) ? 16
|
|
: 32;
|
|
|
|
softrst->rcdev.owner = THIS_MODULE;
|
|
softrst->rcdev.nr_resets = num_regs * softrst->num_per_reg;
|
|
softrst->rcdev.ops = &rockchip_softrst_ops;
|
|
softrst->rcdev.of_node = np;
|
|
ret = reset_controller_register(&softrst->rcdev);
|
|
if (ret) {
|
|
pr_err("%s: could not register reset controller, %d\n",
|
|
__func__, ret);
|
|
kfree(softrst);
|
|
}
|
|
};
|
|
EXPORT_SYMBOL_GPL(rockchip_register_softrst);
|