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db053b86f4
There are a couple of Xen features which rely on directly accessing per-cpu data via a segment register, which is not yet available on x86-64. In the meantime, just disable direct access to the vcpu info structure; this leaves some of the code as dead, but it will come to life in time, and the warnings are suppressed. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
286 lines
6.4 KiB
ArmAsm
286 lines
6.4 KiB
ArmAsm
/*
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Asm versions of Xen pv-ops, suitable for either direct use or inlining.
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The inline versions are the same as the direct-use versions, with the
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pre- and post-amble chopped off.
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This code is encoded for size rather than absolute efficiency,
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with a view to being able to inline as much as possible.
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We only bother with direct forms (ie, vcpu in pda) of the operations
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here; the indirect forms are better handled in C, since they're
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generally too large to inline anyway.
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*/
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/processor-flags.h>
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#include <asm/errno.h>
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#include <asm/segment.h>
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#include <xen/interface/xen.h>
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#define RELOC(x, v) .globl x##_reloc; x##_reloc=v
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#define ENDPATCH(x) .globl x##_end; x##_end=.
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/* Pseudo-flag used for virtual NMI, which we don't implement yet */
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#define XEN_EFLAGS_NMI 0x80000000
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#if 1
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/*
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x86-64 does not yet support direct access to percpu variables
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via a segment override, so we just need to make sure this code
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never gets used
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*/
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#define BUG ud2a
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#define PER_CPU_VAR(var, off) 0xdeadbeef
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#endif
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/*
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Enable events. This clears the event mask and tests the pending
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event status with one and operation. If there are pending
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events, then enter the hypervisor to get them handled.
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*/
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ENTRY(xen_irq_enable_direct)
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BUG
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/* Unmask events */
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movb $0, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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/* Preempt here doesn't matter because that will deal with
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any pending interrupts. The pending check may end up being
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run on the wrong CPU, but that doesn't hurt. */
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/* Test for pending */
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testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
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jz 1f
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2: call check_events
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1:
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ENDPATCH(xen_irq_enable_direct)
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ret
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ENDPROC(xen_irq_enable_direct)
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RELOC(xen_irq_enable_direct, 2b+1)
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/*
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Disabling events is simply a matter of making the event mask
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non-zero.
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*/
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ENTRY(xen_irq_disable_direct)
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BUG
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movb $1, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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ENDPATCH(xen_irq_disable_direct)
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ret
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ENDPROC(xen_irq_disable_direct)
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RELOC(xen_irq_disable_direct, 0)
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/*
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(xen_)save_fl is used to get the current interrupt enable status.
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Callers expect the status to be in X86_EFLAGS_IF, and other bits
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may be set in the return value. We take advantage of this by
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making sure that X86_EFLAGS_IF has the right value (and other bits
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in that byte are 0), but other bits in the return value are
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undefined. We need to toggle the state of the bit, because
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Xen and x86 use opposite senses (mask vs enable).
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*/
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ENTRY(xen_save_fl_direct)
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BUG
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testb $0xff, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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setz %ah
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addb %ah,%ah
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ENDPATCH(xen_save_fl_direct)
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ret
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ENDPROC(xen_save_fl_direct)
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RELOC(xen_save_fl_direct, 0)
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/*
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In principle the caller should be passing us a value return
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from xen_save_fl_direct, but for robustness sake we test only
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the X86_EFLAGS_IF flag rather than the whole byte. After
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setting the interrupt mask state, it checks for unmasked
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pending events and enters the hypervisor to get them delivered
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if so.
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*/
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ENTRY(xen_restore_fl_direct)
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BUG
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testb $X86_EFLAGS_IF>>8, %ah
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setz PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_mask)
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/* Preempt here doesn't matter because that will deal with
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any pending interrupts. The pending check may end up being
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run on the wrong CPU, but that doesn't hurt. */
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/* check for unmasked and pending */
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cmpw $0x0001, PER_CPU_VAR(xen_vcpu_info, XEN_vcpu_info_pending)
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jz 1f
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2: call check_events
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1:
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ENDPATCH(xen_restore_fl_direct)
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ret
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ENDPROC(xen_restore_fl_direct)
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RELOC(xen_restore_fl_direct, 2b+1)
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/*
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Force an event check by making a hypercall,
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but preserve regs before making the call.
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*/
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check_events:
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push %rax
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push %rcx
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push %rdx
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push %rsi
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push %rdi
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push %r8
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push %r9
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push %r10
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push %r11
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call xen_force_evtchn_callback
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pop %r11
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pop %r10
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pop %r9
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pop %r8
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pop %rdi
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pop %rsi
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pop %rdx
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pop %rcx
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pop %rax
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ret
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ENTRY(xen_adjust_exception_frame)
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mov 8+0(%rsp),%rcx
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mov 8+8(%rsp),%r11
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ret $16
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hypercall_iret = hypercall_page + __HYPERVISOR_iret * 32
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/*
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Xen64 iret frame:
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ss
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rsp
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rflags
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cs
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rip <-- standard iret frame
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flags
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rcx }
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r11 }<-- pushed by hypercall page
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rsp -> rax }
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*/
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ENTRY(xen_iret)
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pushq $0
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1: jmp hypercall_iret
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ENDPATCH(xen_iret)
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RELOC(xen_iret, 1b+1)
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/*
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sysexit is not used for 64-bit processes, so it's
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only ever used to return to 32-bit compat userspace.
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*/
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ENTRY(xen_sysexit)
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pushq $__USER32_DS
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pushq %rcx
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pushq $X86_EFLAGS_IF
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pushq $__USER32_CS
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pushq %rdx
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pushq $0
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1: jmp hypercall_iret
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ENDPATCH(xen_sysexit)
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RELOC(xen_sysexit, 1b+1)
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ENTRY(xen_sysret64)
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/* We're already on the usermode stack at this point, but still
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with the kernel gs, so we can easily switch back */
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movq %rsp, %gs:pda_oldrsp
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movq %gs:pda_kernelstack,%rsp
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pushq $__USER_DS
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pushq %gs:pda_oldrsp
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pushq %r11
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pushq $__USER_CS
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pushq %rcx
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pushq $VGCF_in_syscall
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1: jmp hypercall_iret
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ENDPATCH(xen_sysret64)
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RELOC(xen_sysret64, 1b+1)
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ENTRY(xen_sysret32)
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/* We're already on the usermode stack at this point, but still
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with the kernel gs, so we can easily switch back */
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movq %rsp, %gs:pda_oldrsp
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movq %gs:pda_kernelstack, %rsp
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pushq $__USER32_DS
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pushq %gs:pda_oldrsp
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pushq %r11
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pushq $__USER32_CS
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pushq %rcx
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pushq $VGCF_in_syscall
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1: jmp hypercall_iret
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ENDPATCH(xen_sysret32)
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RELOC(xen_sysret32, 1b+1)
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/*
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Xen handles syscall callbacks much like ordinary exceptions,
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which means we have:
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- kernel gs
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- kernel rsp
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- an iret-like stack frame on the stack (including rcx and r11):
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ss
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rsp
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rflags
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cs
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rip
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r11
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rsp-> rcx
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In all the entrypoints, we undo all that to make it look
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like a CPU-generated syscall/sysenter and jump to the normal
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entrypoint.
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*/
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.macro undo_xen_syscall
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mov 0*8(%rsp),%rcx
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mov 1*8(%rsp),%r11
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mov 5*8(%rsp),%rsp
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.endm
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/* Normal 64-bit system call target */
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ENTRY(xen_syscall_target)
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undo_xen_syscall
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jmp system_call_after_swapgs
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ENDPROC(xen_syscall_target)
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#ifdef CONFIG_IA32_EMULATION
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/* 32-bit compat syscall target */
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ENTRY(xen_syscall32_target)
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undo_xen_syscall
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jmp ia32_cstar_target
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ENDPROC(xen_syscall32_target)
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/* 32-bit compat sysenter target */
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ENTRY(xen_sysenter_target)
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undo_xen_syscall
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jmp ia32_sysenter_target
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ENDPROC(xen_sysenter_target)
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#else /* !CONFIG_IA32_EMULATION */
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ENTRY(xen_syscall32_target)
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ENTRY(xen_sysenter_target)
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lea 16(%rsp), %rsp /* strip %rcx,%r11 */
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mov $-ENOSYS, %rax
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pushq $VGCF_in_syscall
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jmp hypercall_iret
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ENDPROC(xen_syscall32_target)
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ENDPROC(xen_sysenter_target)
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#endif /* CONFIG_IA32_EMULATION */
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