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39d114ddc6
This patch adds arch specific code for kernel address sanitizer (see Documentation/kasan.txt). 1/8 of kernel addresses reserved for shadow memory. There was no big enough hole for this, so virtual addresses for shadow were stolen from vmalloc area. At early boot stage the whole shadow region populated with just one physical page (kasan_zero_page). Later, this page reused as readonly zero shadow for some memory that KASan currently don't track (vmalloc). After mapping the physical memory, pages for shadow memory are allocated and mapped. Functions like memset/memmove/memcpy do a lot of memory accesses. If bad pointer passed to one of these function it is important to catch this. Compiler's instrumentation cannot do this since these functions are written in assembly. KASan replaces memory functions with manually instrumented variants. Original functions declared as weak symbols so strong definitions in mm/kasan/kasan.c could replace them. Original functions have aliases with '__' prefix in name, so we could call non-instrumented variant if needed. Some files built without kasan instrumentation (e.g. mm/slub.c). Original mem* function replaced (via #define) with prefixed variants to disable memory access checks for such files. Signed-off-by: Andrey Ryabinin <ryabinin.a.a@gmail.com> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
201 lines
4.3 KiB
ArmAsm
201 lines
4.3 KiB
ArmAsm
/*
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* Copyright (C) 2013 ARM Ltd.
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* Copyright (C) 2013 Linaro.
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*
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* This code is based on glibc cortex strings work originally authored by Linaro
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* and re-licensed under GPLv2 for the Linux kernel. The original code can
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* be found @
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*
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* http://bazaar.launchpad.net/~linaro-toolchain-dev/cortex-strings/trunk/
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* files/head:/src/aarch64/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/cache.h>
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/*
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* Move a buffer from src to test (alignment handled by the hardware).
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* If dest <= src, call memcpy, otherwise copy in reverse order.
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*
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* Parameters:
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* x0 - dest
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* x1 - src
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* x2 - n
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* Returns:
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* x0 - dest
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*/
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dstin .req x0
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src .req x1
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count .req x2
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tmp1 .req x3
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tmp1w .req w3
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tmp2 .req x4
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tmp2w .req w4
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tmp3 .req x5
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tmp3w .req w5
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dst .req x6
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A_l .req x7
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A_h .req x8
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B_l .req x9
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B_h .req x10
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C_l .req x11
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C_h .req x12
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D_l .req x13
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D_h .req x14
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.weak memmove
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ENTRY(__memmove)
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ENTRY(memmove)
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cmp dstin, src
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b.lo __memcpy
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add tmp1, src, count
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cmp dstin, tmp1
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b.hs __memcpy /* No overlap. */
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add dst, dstin, count
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add src, src, count
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cmp count, #16
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b.lo .Ltail15 /*probably non-alignment accesses.*/
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ands tmp2, src, #15 /* Bytes to reach alignment. */
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b.eq .LSrcAligned
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sub count, count, tmp2
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/*
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* process the aligned offset length to make the src aligned firstly.
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* those extra instructions' cost is acceptable. It also make the
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* coming accesses are based on aligned address.
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*/
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tbz tmp2, #0, 1f
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ldrb tmp1w, [src, #-1]!
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strb tmp1w, [dst, #-1]!
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1:
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tbz tmp2, #1, 2f
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ldrh tmp1w, [src, #-2]!
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strh tmp1w, [dst, #-2]!
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2:
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tbz tmp2, #2, 3f
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ldr tmp1w, [src, #-4]!
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str tmp1w, [dst, #-4]!
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3:
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tbz tmp2, #3, .LSrcAligned
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ldr tmp1, [src, #-8]!
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str tmp1, [dst, #-8]!
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.LSrcAligned:
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cmp count, #64
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b.ge .Lcpy_over64
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/*
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* Deal with small copies quickly by dropping straight into the
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* exit block.
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*/
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.Ltail63:
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/*
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* Copy up to 48 bytes of data. At this point we only need the
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* bottom 6 bits of count to be accurate.
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*/
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ands tmp1, count, #0x30
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b.eq .Ltail15
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cmp tmp1w, #0x20
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b.eq 1f
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b.lt 2f
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ldp A_l, A_h, [src, #-16]!
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stp A_l, A_h, [dst, #-16]!
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1:
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ldp A_l, A_h, [src, #-16]!
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stp A_l, A_h, [dst, #-16]!
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2:
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ldp A_l, A_h, [src, #-16]!
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stp A_l, A_h, [dst, #-16]!
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.Ltail15:
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tbz count, #3, 1f
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ldr tmp1, [src, #-8]!
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str tmp1, [dst, #-8]!
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1:
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tbz count, #2, 2f
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ldr tmp1w, [src, #-4]!
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str tmp1w, [dst, #-4]!
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2:
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tbz count, #1, 3f
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ldrh tmp1w, [src, #-2]!
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strh tmp1w, [dst, #-2]!
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3:
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tbz count, #0, .Lexitfunc
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ldrb tmp1w, [src, #-1]
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strb tmp1w, [dst, #-1]
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.Lexitfunc:
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ret
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.Lcpy_over64:
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subs count, count, #128
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b.ge .Lcpy_body_large
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/*
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* Less than 128 bytes to copy, so handle 64 bytes here and then jump
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* to the tail.
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*/
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ldp A_l, A_h, [src, #-16]
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stp A_l, A_h, [dst, #-16]
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ldp B_l, B_h, [src, #-32]
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ldp C_l, C_h, [src, #-48]
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stp B_l, B_h, [dst, #-32]
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stp C_l, C_h, [dst, #-48]
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ldp D_l, D_h, [src, #-64]!
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stp D_l, D_h, [dst, #-64]!
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tst count, #0x3f
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b.ne .Ltail63
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ret
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/*
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* Critical loop. Start at a new cache line boundary. Assuming
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* 64 bytes per line this ensures the entire loop is in one line.
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*/
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.p2align L1_CACHE_SHIFT
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.Lcpy_body_large:
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/* pre-load 64 bytes data. */
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ldp A_l, A_h, [src, #-16]
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ldp B_l, B_h, [src, #-32]
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ldp C_l, C_h, [src, #-48]
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ldp D_l, D_h, [src, #-64]!
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1:
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/*
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* interlace the load of next 64 bytes data block with store of the last
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* loaded 64 bytes data.
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*/
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stp A_l, A_h, [dst, #-16]
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ldp A_l, A_h, [src, #-16]
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stp B_l, B_h, [dst, #-32]
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ldp B_l, B_h, [src, #-32]
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stp C_l, C_h, [dst, #-48]
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ldp C_l, C_h, [src, #-48]
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stp D_l, D_h, [dst, #-64]!
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ldp D_l, D_h, [src, #-64]!
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subs count, count, #64
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b.ge 1b
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stp A_l, A_h, [dst, #-16]
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stp B_l, B_h, [dst, #-32]
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stp C_l, C_h, [dst, #-48]
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stp D_l, D_h, [dst, #-64]!
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tst count, #0x3f
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b.ne .Ltail63
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ret
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ENDPIPROC(memmove)
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ENDPROC(__memmove)
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