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379df2793e
This pushes the dependencies on the Integrator/AP system controller (SC) down into the PCI V3 driver and the AP-specific board file. First, the platform data for the PL010 UART is moved into the integrator_ap.c board file, and the Integrator/CP is assigned with NULL pdata. This way the callback functions can reference the dynamically remapped AP syscon address in both the ATAG and DT boot path, and this remapping is localized to the board file. Second the PCIv3 driver is making its own dynamic remapping of the SC for the few registers it is using. When we convert the PCIv3 driver over to using device tree having a dynamically assigned base address will be useful, but we will have to use the definition from <mach/platform.h> for now, the only improvement is that it's done dynamically. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
221 lines
5.0 KiB
C
221 lines
5.0 KiB
C
/*
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* linux/arch/arm/mach-integrator/core.c
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*
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/export.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/memblock.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/io.h>
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#include <linux/stat.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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#include <mach/cm.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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#include <asm/mach/time.h>
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#include <asm/pgtable.h>
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#include "common.h"
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#ifdef CONFIG_ATAGS
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#define INTEGRATOR_RTC_IRQ { IRQ_RTCINT }
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#define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 }
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#define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 }
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#define KMI0_IRQ { IRQ_KMIINT0 }
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#define KMI1_IRQ { IRQ_KMIINT1 }
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static AMBA_APB_DEVICE(rtc, "rtc", 0,
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INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL);
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static AMBA_APB_DEVICE(uart0, "uart0", 0,
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INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, NULL);
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static AMBA_APB_DEVICE(uart1, "uart1", 0,
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INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, NULL);
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static AMBA_APB_DEVICE(kmi0, "kmi0", 0, KMI0_BASE, KMI0_IRQ, NULL);
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static AMBA_APB_DEVICE(kmi1, "kmi1", 0, KMI1_BASE, KMI1_IRQ, NULL);
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static struct amba_device *amba_devs[] __initdata = {
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&rtc_device,
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&uart0_device,
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&uart1_device,
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&kmi0_device,
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&kmi1_device,
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};
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int __init integrator_init(bool is_cp)
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{
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int i;
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/*
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* The Integrator/AP lacks necessary AMBA PrimeCell IDs, so we need to
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* hard-code them. The Integator/CP and forward have proper cell IDs.
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* Else we leave them undefined to the bus driver can autoprobe them.
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*/
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if (!is_cp) {
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rtc_device.periphid = 0x00041030;
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uart0_device.periphid = 0x00041010;
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uart1_device.periphid = 0x00041010;
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kmi0_device.periphid = 0x00041050;
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kmi1_device.periphid = 0x00041050;
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uart0_device.dev.platform_data = &ap_uart_data;
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uart1_device.dev.platform_data = &ap_uart_data;
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}
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for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
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struct amba_device *d = amba_devs[i];
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amba_device_register(d, &iomem_resource);
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}
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return 0;
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}
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#endif
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static DEFINE_RAW_SPINLOCK(cm_lock);
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/**
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* cm_control - update the CM_CTRL register.
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* @mask: bits to change
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* @set: bits to set
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*/
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void cm_control(u32 mask, u32 set)
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{
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&cm_lock, flags);
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val = readl(CM_CTRL) & ~mask;
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writel(val | set, CM_CTRL);
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raw_spin_unlock_irqrestore(&cm_lock, flags);
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}
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EXPORT_SYMBOL(cm_control);
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/*
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* We need to stop things allocating the low memory; ideally we need a
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* better implementation of GFP_DMA which does not assume that DMA-able
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* memory starts at zero.
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*/
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void __init integrator_reserve(void)
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{
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memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
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}
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/*
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* To reset, we hit the on-board reset register in the system FPGA
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*/
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void integrator_restart(char mode, const char *cmd)
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{
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cm_control(CM_CTRL_RESET, CM_CTRL_RESET);
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}
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static u32 integrator_id;
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static ssize_t intcp_get_manf(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", integrator_id >> 24);
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}
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static struct device_attribute intcp_manf_attr =
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__ATTR(manufacturer, S_IRUGO, intcp_get_manf, NULL);
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static ssize_t intcp_get_arch(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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const char *arch;
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switch ((integrator_id >> 16) & 0xff) {
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case 0x00:
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arch = "ASB little-endian";
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break;
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case 0x01:
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arch = "AHB little-endian";
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break;
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case 0x03:
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arch = "AHB-Lite system bus, bi-endian";
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break;
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case 0x04:
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arch = "AHB";
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break;
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default:
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arch = "Unknown";
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break;
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}
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return sprintf(buf, "%s\n", arch);
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}
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static struct device_attribute intcp_arch_attr =
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__ATTR(architecture, S_IRUGO, intcp_get_arch, NULL);
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static ssize_t intcp_get_fpga(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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const char *fpga;
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switch ((integrator_id >> 12) & 0xf) {
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case 0x01:
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fpga = "XC4062";
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break;
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case 0x02:
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fpga = "XC4085";
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break;
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case 0x04:
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fpga = "EPM7256AE (Altera PLD)";
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break;
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default:
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fpga = "Unknown";
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break;
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}
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return sprintf(buf, "%s\n", fpga);
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}
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static struct device_attribute intcp_fpga_attr =
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__ATTR(fpga, S_IRUGO, intcp_get_fpga, NULL);
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static ssize_t intcp_get_build(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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return sprintf(buf, "%02x\n", (integrator_id >> 4) & 0xFF);
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}
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static struct device_attribute intcp_build_attr =
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__ATTR(build, S_IRUGO, intcp_get_build, NULL);
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void integrator_init_sysfs(struct device *parent, u32 id)
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{
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integrator_id = id;
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device_create_file(parent, &intcp_manf_attr);
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device_create_file(parent, &intcp_arch_attr);
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device_create_file(parent, &intcp_fpga_attr);
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device_create_file(parent, &intcp_build_attr);
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}
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