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6b3087c64a
Blackfin dual core BF561 processor can support SMP like features. https://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like In this patch, we provide SMP extend to Blackfin header files and machine common code Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
214 lines
4.7 KiB
C
214 lines
4.7 KiB
C
#ifndef __ARCH_BLACKFIN_ATOMIC__
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#define __ARCH_BLACKFIN_ATOMIC__
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#include <linux/types.h>
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#include <asm/system.h> /* local_irq_XXX() */
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*
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* Generally we do not concern about SMP BFIN systems, so we don't have
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* to deal with that.
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*
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* Tony Kou (tonyko@lineo.ca) Lineo Inc. 2001
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_set(v, i) (((v)->counter) = i)
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#ifdef CONFIG_SMP
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#define atomic_read(v) __raw_uncached_fetch_asm(&(v)->counter)
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asmlinkage int __raw_uncached_fetch_asm(const volatile int *ptr);
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asmlinkage int __raw_atomic_update_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_clear_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_set_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_xor_asm(volatile int *ptr, int value);
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asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
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static inline void atomic_add(int i, atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, i);
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, -i);
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __raw_atomic_update_asm(&v->counter, i);
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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return __raw_atomic_update_asm(&v->counter, -i);
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}
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static inline void atomic_inc(volatile atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, 1);
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}
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static inline void atomic_dec(volatile atomic_t *v)
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{
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__raw_atomic_update_asm(&v->counter, -1);
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}
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static inline void atomic_clear_mask(int mask, atomic_t *v)
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{
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__raw_atomic_clear_asm(&v->counter, mask);
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}
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static inline void atomic_set_mask(int mask, atomic_t *v)
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{
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__raw_atomic_set_asm(&v->counter, mask);
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}
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static inline int atomic_test_mask(int mask, atomic_t *v)
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{
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return __raw_atomic_test_asm(&v->counter, mask);
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}
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#else /* !CONFIG_SMP */
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#define atomic_read(v) ((v)->counter)
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static inline void atomic_add(int i, atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter += i;
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local_irq_restore(flags);
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter -= i;
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local_irq_restore(flags);
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int __temp = 0;
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long flags;
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local_irq_save(flags);
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v->counter += i;
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__temp = v->counter;
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local_irq_restore(flags);
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return __temp;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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int __temp = 0;
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long flags;
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local_irq_save(flags);
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v->counter -= i;
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__temp = v->counter;
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local_irq_restore(flags);
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return __temp;
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}
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static inline void atomic_inc(volatile atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter++;
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local_irq_restore(flags);
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}
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static inline void atomic_dec(volatile atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter--;
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local_irq_restore(flags);
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}
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static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter &= ~mask;
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local_irq_restore(flags);
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}
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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long flags;
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local_irq_save(flags);
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v->counter |= mask;
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local_irq_restore(flags);
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}
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#endif /* !CONFIG_SMP */
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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#define atomic_dec_return(v) atomic_sub_return(1,(v))
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#define atomic_inc_return(v) atomic_add_return(1,(v))
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#define atomic_add_unless(v, a, u) \
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({ \
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int c, old; \
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c = atomic_read(v); \
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while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
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c = old; \
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c != (u); \
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})
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
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#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
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#include <asm-generic/atomic.h>
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#endif /* __ARCH_BLACKFIN_ATOMIC __ */
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