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6a92e1982d
In some of the RAM size autodetection code on ColdFire CPU startup we reference DRAM registers relative to the MBAR register. Not all of the supported ColdFire CPUs have an MBAR, and currently this works because we fake an MBAR address on those registers. In an effort to clean this up, and eventually remove the fake MBAR setting make the DRAM register address definitions actually contain the MBAR (or IPSBAR as appropriate) value as required. Signed-off-by: Greg Ungerer <gerg@uclinux.org> |
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| .. | ||
| cache.c | ||
| clk.c | ||
| dma_timer.c | ||
| dma.c | ||
| entry.S | ||
| gpio.c | ||
| head.S | ||
| intc-2.c | ||
| intc-simr.c | ||
| intc.c | ||
| Makefile | ||
| pinmux.c | ||
| pit.c | ||
| sltimers.c | ||
| timers.c | ||
| vectors.c | ||