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f83ccb9358
A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUz/11WCrR//JCVInAQIIyRAA0DjdNNQ/A4G2i1nZCiTFH6a4oZy4JarN ATVPkW/V8avhh+yVNe5FWA44Xe6CDC5TXwMaIsbK+w3Iclj3fplh/MsBkQ9ZT9Sl LAjJoOjuYucCeDy0WLVioRKZ4PJEDoCu/oZTauIMnmWCOCRxLYpOM3FkAT9oN/Ti lswpTSLiV1/U3ZSI4M3qn+Sx1VJL8c/hAIWbvf5if2diYkWPk3VOSKyxmD9zLWdD Iqtb79J+ETVeOIM4sHnx79cG4ZCdpOfRAl7qx6hkJu0YATXESxWhpXVE2McTJuzM qHKsRRNSfsfSWPeF4angll9o06X/qgdT6C4P2dfH49lGeG7llOttw3OaCx3hWCTe U5bt26qtbwG2ZbzocaqvideP+rbpQrCH2vdO1embPv5Lu6peMoBWjxy6twSVXJBG LIymJ0IbiGYxL7BReGqRXt6ehy0BDWBeTSTdsGqgEl2TnxHuS/kgGfJc4D5riiEk aRPVq10p/k+yo4BZtq2GqXIOG6cqkIQ5lhl5Tg9+MfUlquAONqJP70FgRJDBIw9L 9uJp71bgSsA6eYg2tXoqJtpdjKplDWavgtACzIkFg2qFLyYmKvx+F0AXbeTIsrri /mIchTyG+dgiIjWvj/Xsf7jhrdzRcl3uKsJwFmk927pIsh24HV8T+LKgHrf+sVcO qEsEnKGYA6s= =zl/N -----END PGP SIGNATURE----- Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree changes from Arnd Bergmann: "A large part of the arm-soc patches are nowadays DT changes, adding support for new SoCs, boards and devices without changing kernel source. The plan is still to move the devicetree files out of the kernel tree and reduce the amount of churn going on here, but we keep finding reasons to delay doing that. Changes are really all over the place, with little sticking out particularly. We have contributions from a total of 116 people in this branch. Unfortunately, the size of this branch also causes a significant number of conflicts at the moment, typically when subsystem maintainers merge patches that change the driver at the same time as the dts files. In most cases this could be avoided because the dts changes are supposed to be compatible in both ways, and we are asking everyone to send ARM dts changes through our tree only" * tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits) dts: stmmac: Document the clocks property in the stmmac base document dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. ARM: STi: stih41x: Add support for the FSM Serial Flash Controller ARM: STi: stih416: Add support for the FSM Serial Flash Controller ARM: tegra: fix Dalmore pinctrl configuration ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND ARM: dts: Build all keystone dt blobs ARM: dts: keystone: Fix control register range for clktsip ARM: dts: keystone: Fix domain register range for clkfftc1 ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap ARM: dts: bcm21664: Add device tree files. ARM: DT: bcm21664: Device tree bindings ARM: efm32: properly namespace i2c location property ARM: efm32: fix unit address part in USART2 device nodes' names ARM: mvebu: Enable NAND controller in Armada 385-DB ARM: mvebu: Add support for NAND controller in Armada 38x SoC ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs ...
253 lines
5.5 KiB
Plaintext
253 lines
5.5 KiB
Plaintext
/*
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* Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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* Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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#include "imx53-tqma53.dtsi"
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/ {
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model = "TQ MBa53 starter kit";
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compatible = "tq,mba53", "tq,tqma53", "fsl,imx53";
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backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm2 0 50000>;
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brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
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default-brightness-level = <10>;
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enable-gpios = <&gpio7 7 0>;
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power-supply = <®_backlight>;
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};
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disp1: display@disp1 {
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compatible = "fsl,imx-parallel-display";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_disp1_1>;
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interface-pix-fmt = "rgb24";
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status = "disabled";
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port {
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display1_in: endpoint {
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remote-endpoint = <&ipu_di1_disp1>;
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};
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_backlight: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "lcd-supply";
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gpio = <&gpio2 5 0>;
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startup-delay-us = <5000>;
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};
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reg_3p2v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P2V";
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regulator-min-microvolt = <3200000>;
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regulator-max-microvolt = <3200000>;
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regulator-always-on;
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};
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};
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sound {
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compatible = "tq,imx53-mba53-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx53-mba53-sgtl5000";
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ssi-controller = <&ssi2>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <2>;
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mux-ext-port = <5>;
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};
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};
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&ldb {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lvds1_1>;
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status = "disabled";
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};
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&iomuxc {
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lvds1 {
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pinctrl_lvds1_1: lvds1-grp1 {
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fsl,pins = <
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MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
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MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000
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MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000
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MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000
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MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000
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>;
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};
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pinctrl_lvds1_2: lvds1-grp2 {
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fsl,pins = <
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MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000
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MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000
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MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000
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MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000
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MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
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>;
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};
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};
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disp1 {
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pinctrl_disp1_1: disp1-grp1 {
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fsl,pins = <
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MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */
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MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */
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MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */
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MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */
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MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000
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MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000
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MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000
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MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000
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MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000
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MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000
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MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000
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MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000
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MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000
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MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000
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MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000
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MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000
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MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000
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MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000
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MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000
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MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000
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MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000
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MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000
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MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000
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MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000
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MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000
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MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000
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MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000
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MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000
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>;
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};
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};
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tve {
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pinctrl_vga_sync_1: vgasync-grp1 {
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fsl,pins = <
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/* VGA_VSYNC, HSYNC with max drive strength */
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MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6
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MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6
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>;
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};
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};
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};
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&ipu_di1_disp1 {
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remote-endpoint = <&display1_in>;
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};
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&cspi {
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status = "okay";
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};
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&audmux {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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};
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&i2c2 {
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codec: sgtl5000@a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
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VDDA-supply = <®_3p2v>;
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VDDIO-supply = <®_3p2v>;
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};
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expander: pca9554@20 {
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compatible = "pca9554";
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reg = <0x20>;
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interrupts = <109>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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sensor2: lm75@49 {
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compatible = "lm75";
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reg = <0x49>;
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};
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};
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&fec {
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phy-reset-gpios = <&gpio7 6 0>;
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status = "okay";
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};
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&esdhc2 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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};
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&ecspi1 {
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status = "okay";
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};
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&usbotg {
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dr_mode = "host";
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status = "okay";
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};
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&usbh1 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&uart2 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&can2 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&tve {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vga_sync_1>;
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i2c-ddc-bus = <&i2c3>;
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fsl,tve-mode = "vga";
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fsl,hsync-pin = <4>;
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fsl,vsync-pin = <6>;
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status = "okay";
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};
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