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e237a55184
Per the x86-specific footnote to PCI spec r3.0, sec 6.2.4, the value 255 in
the Interrupt Line register means "unknown" or "no connection."
Previously, when we couldn't derive an IRQ from the _PRT, we fell back to
using the value from Interrupt Line as an IRQ. It's questionable whether
we should do that at all, but the spec clearly suggests we shouldn't do it
for the value 255 on x86.
Calling request_irq() with IRQ 255 may succeed, but the driver won't
receive any interrupts. Or, if IRQ 255 is shared with another device, it
may succeed, and the driver's ISR will be called at random times when the
*other* device interrupts. Or it may fail if another device is using IRQ
255 with incompatible flags. What we *want* is for request_irq() to fail
predictably so the driver can fall back to polling.
On x86, assume 255 in the Interrupt Line means the INTx line is not
connected. In that case, set dev->irq to IRQ_NOTCONNECTED so request_irq()
will fail gracefully with -ENOTCONN.
We found this problem on a system where Secure Boot firmware assigned
Interrupt Line 255 to an i801_smbus device and another device was already
using MSI-X IRQ 255. This was in v3.10, where i801_probe() fails if
request_irq() fails:
i801_smbus 0000:00:1f.3: enabling device (0140 -> 0143)
i801_smbus 0000:00:1f.3: can't derive routing for PCI INT C
i801_smbus 0000:00:1f.3: PCI INT C: no GSI
genirq: Flags mismatch irq 255. 00000080 (i801_smbus) vs. 00000000 (megasa)
CPU: 0 PID: 2487 Comm: kworker/0:1 Not tainted 3.10.0-229.el7.x86_64 #1
Hardware name: FUJITSU PRIMEQUEST 2800E2/D3736, BIOS PRIMEQUEST 2000 Serie5
Call Trace:
dump_stack+0x19/0x1b
__setup_irq+0x54a/0x570
request_threaded_irq+0xcc/0x170
i801_probe+0x32f/0x508 [i2c_i801]
local_pci_probe+0x45/0xa0
i801_smbus 0000:00:1f.3: Failed to allocate irq 255: -16
i801_smbus: probe of 0000:00:1f.3 failed with error -16
After aeb8a3d16a
("i2c: i801: Check if interrupts are disabled"),
i801_probe() will fall back to polling if request_irq() fails. But we
still need this patch because request_irq() may succeed or fail depending
on other devices in the system. If request_irq() fails, i801_smbus will
work by falling back to polling, but if it succeeds, i801_smbus won't work
because it expects interrupts that it may not receive.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
532 lines
14 KiB
C
532 lines
14 KiB
C
/*
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* pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
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*
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* Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
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* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2002 Dominik Brodowski <devel@brodo.de>
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* (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/dmi.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/pm.h>
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#define PREFIX "ACPI: "
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#define _COMPONENT ACPI_PCI_COMPONENT
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ACPI_MODULE_NAME("pci_irq");
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struct acpi_prt_entry {
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struct acpi_pci_id id;
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u8 pin;
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acpi_handle link;
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u32 index; /* GSI, or link _CRS index */
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};
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static inline char pin_name(int pin)
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{
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return 'A' + pin - 1;
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}
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/* --------------------------------------------------------------------------
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PCI IRQ Routing Table (PRT) Support
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-------------------------------------------------------------------------- */
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/* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
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static const struct dmi_system_id medion_md9580[] = {
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{
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.ident = "Medion MD9580-F laptop",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
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DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
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},
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},
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{ }
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};
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/* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
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static const struct dmi_system_id dell_optiplex[] = {
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{
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.ident = "Dell Optiplex GX1",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
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DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
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},
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},
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{ }
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};
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/* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
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static const struct dmi_system_id hp_t5710[] = {
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{
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.ident = "HP t5710",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
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DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
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},
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},
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{ }
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};
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struct prt_quirk {
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const struct dmi_system_id *system;
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unsigned int segment;
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unsigned int bus;
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unsigned int device;
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unsigned char pin;
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const char *source; /* according to BIOS */
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const char *actual_source;
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};
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#define PCI_INTX_PIN(c) (c - 'A' + 1)
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/*
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* These systems have incorrect _PRT entries. The BIOS claims the PCI
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* interrupt at the listed segment/bus/device/pin is connected to the first
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* link device, but it is actually connected to the second.
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*/
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static const struct prt_quirk prt_quirks[] = {
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{ medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
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"\\_SB_.PCI0.ISA_.LNKA",
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"\\_SB_.PCI0.ISA_.LNKB"},
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{ dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
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"\\_SB_.LNKB",
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"\\_SB_.LNKA"},
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{ hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
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"\\_SB_.PCI0.LNK1",
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"\\_SB_.PCI0.LNK3"},
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};
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static void do_prt_fixups(struct acpi_prt_entry *entry,
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struct acpi_pci_routing_table *prt)
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{
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int i;
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const struct prt_quirk *quirk;
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for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
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quirk = &prt_quirks[i];
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/* All current quirks involve link devices, not GSIs */
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if (dmi_check_system(quirk->system) &&
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entry->id.segment == quirk->segment &&
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entry->id.bus == quirk->bus &&
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entry->id.device == quirk->device &&
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entry->pin == quirk->pin &&
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!strcmp(prt->source, quirk->source) &&
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strlen(prt->source) >= strlen(quirk->actual_source)) {
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printk(KERN_WARNING PREFIX "firmware reports "
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"%04x:%02x:%02x PCI INT %c connected to %s; "
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"changing to %s\n",
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entry->id.segment, entry->id.bus,
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entry->id.device, pin_name(entry->pin),
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prt->source, quirk->actual_source);
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strcpy(prt->source, quirk->actual_source);
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}
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}
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}
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static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
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int pin, struct acpi_pci_routing_table *prt,
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struct acpi_prt_entry **entry_ptr)
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{
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int segment = pci_domain_nr(dev->bus);
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int bus = dev->bus->number;
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int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
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struct acpi_prt_entry *entry;
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if (((prt->address >> 16) & 0xffff) != device ||
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prt->pin + 1 != pin)
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return -ENODEV;
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entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
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if (!entry)
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return -ENOMEM;
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/*
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* Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
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* 1=INTA, 2=INTB. We use the PCI encoding throughout, so convert
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* it here.
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*/
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entry->id.segment = segment;
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entry->id.bus = bus;
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entry->id.device = (prt->address >> 16) & 0xFFFF;
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entry->pin = prt->pin + 1;
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do_prt_fixups(entry, prt);
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entry->index = prt->source_index;
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/*
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* Type 1: Dynamic
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* ---------------
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* The 'source' field specifies the PCI interrupt link device used to
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* configure the IRQ assigned to this slot|dev|pin. The 'source_index'
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* indicates which resource descriptor in the resource template (of
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* the link device) this interrupt is allocated from.
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*
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* NOTE: Don't query the Link Device for IRQ information at this time
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* because Link Device enumeration may not have occurred yet
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* (e.g. exists somewhere 'below' this _PRT entry in the ACPI
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* namespace).
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*/
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if (prt->source[0])
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acpi_get_handle(handle, prt->source, &entry->link);
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/*
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* Type 2: Static
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* --------------
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* The 'source' field is NULL, and the 'source_index' field specifies
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* the IRQ value, which is hardwired to specific interrupt inputs on
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* the interrupt controller.
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*/
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ACPI_DEBUG_PRINT_RAW((ACPI_DB_INFO,
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" %04x:%02x:%02x[%c] -> %s[%d]\n",
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entry->id.segment, entry->id.bus,
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entry->id.device, pin_name(entry->pin),
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prt->source, entry->index));
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*entry_ptr = entry;
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return 0;
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}
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static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
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int pin, struct acpi_prt_entry **entry_ptr)
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{
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acpi_status status;
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struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
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struct acpi_pci_routing_table *entry;
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acpi_handle handle = NULL;
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if (dev->bus->bridge)
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handle = ACPI_HANDLE(dev->bus->bridge);
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if (!handle)
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return -ENODEV;
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/* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
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status = acpi_get_irq_routing_table(handle, &buffer);
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if (ACPI_FAILURE(status)) {
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kfree(buffer.pointer);
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return -ENODEV;
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}
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entry = buffer.pointer;
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while (entry && (entry->length > 0)) {
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if (!acpi_pci_irq_check_entry(handle, dev, pin,
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entry, entry_ptr))
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break;
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entry = (struct acpi_pci_routing_table *)
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((unsigned long)entry + entry->length);
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}
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kfree(buffer.pointer);
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return 0;
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}
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/* --------------------------------------------------------------------------
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PCI Interrupt Routing Support
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-------------------------------------------------------------------------- */
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#ifdef CONFIG_X86_IO_APIC
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extern int noioapicquirk;
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extern int noioapicreroute;
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static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
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{
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struct pci_bus *bus_it;
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for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
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if (!bus_it->self)
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return 0;
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if (bus_it->self->irq_reroute_variant)
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return bus_it->self->irq_reroute_variant;
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}
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return 0;
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}
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/*
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* Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
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* entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
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* during interrupt handling). When this INTx generation cannot be disabled,
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* we reroute these interrupts to their legacy equivalent to get rid of
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* spurious interrupts.
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*/
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static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
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struct acpi_prt_entry *entry)
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{
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if (noioapicquirk || noioapicreroute) {
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return 0;
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} else {
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switch (bridge_has_boot_interrupt_variant(dev->bus)) {
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case 0:
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/* no rerouting necessary */
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return 0;
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case INTEL_IRQ_REROUTE_VARIANT:
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/*
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* Remap according to INTx routing table in 6700PXH
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* specs, intel order number 302628-002, section
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* 2.15.2. Other chipsets (80332, ...) have the same
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* mapping and are handled here as well.
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*/
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dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
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"IRQ %d\n", entry->index,
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(entry->index % 4) + 16);
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entry->index = (entry->index % 4) + 16;
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return 1;
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default:
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dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
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"IRQ: unknown mapping\n", entry->index);
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return -1;
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}
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}
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}
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#endif /* CONFIG_X86_IO_APIC */
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static struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
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{
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struct acpi_prt_entry *entry = NULL;
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struct pci_dev *bridge;
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u8 bridge_pin, orig_pin = pin;
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int ret;
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ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
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if (!ret && entry) {
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#ifdef CONFIG_X86_IO_APIC
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acpi_reroute_boot_interrupt(dev, entry);
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#endif /* CONFIG_X86_IO_APIC */
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ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %s[%c] _PRT entry\n",
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pci_name(dev), pin_name(pin)));
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return entry;
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}
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/*
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* Attempt to derive an IRQ for this device from a parent bridge's
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* PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
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*/
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bridge = dev->bus->self;
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while (bridge) {
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pin = pci_swizzle_interrupt_pin(dev, pin);
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if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
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/* PC card has the same IRQ as its cardbridge */
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bridge_pin = bridge->pin;
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if (!bridge_pin) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"No interrupt pin configured for device %s\n",
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pci_name(bridge)));
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return NULL;
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}
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pin = bridge_pin;
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}
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ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
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if (!ret && entry) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"Derived GSI for %s INT %c from %s\n",
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pci_name(dev), pin_name(orig_pin),
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pci_name(bridge)));
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return entry;
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}
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dev = bridge;
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bridge = dev->bus->self;
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}
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dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
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pin_name(orig_pin));
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return NULL;
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}
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#if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
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static int acpi_isa_register_gsi(struct pci_dev *dev)
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{
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u32 dev_gsi;
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/* Interrupt Line values above 0xF are forbidden */
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if (dev->irq > 0 && (dev->irq <= 0xF) &&
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acpi_isa_irq_available(dev->irq) &&
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(acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
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dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
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pin_name(dev->pin), dev->irq);
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acpi_register_gsi(&dev->dev, dev_gsi,
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ACPI_LEVEL_SENSITIVE,
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ACPI_ACTIVE_LOW);
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return 0;
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}
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return -EINVAL;
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}
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#else
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static inline int acpi_isa_register_gsi(struct pci_dev *dev)
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{
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return -ENODEV;
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}
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#endif
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static inline bool acpi_pci_irq_valid(struct pci_dev *dev, u8 pin)
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{
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#ifdef CONFIG_X86
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/*
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* On x86 irq line 0xff means "unknown" or "no connection"
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* (PCI 3.0, Section 6.2.4, footnote on page 223).
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*/
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if (dev->irq == 0xff) {
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dev->irq = IRQ_NOTCONNECTED;
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dev_warn(&dev->dev, "PCI INT %c: not connected\n",
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pin_name(pin));
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return false;
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}
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#endif
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return true;
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}
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int acpi_pci_irq_enable(struct pci_dev *dev)
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{
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struct acpi_prt_entry *entry;
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int gsi;
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u8 pin;
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int triggering = ACPI_LEVEL_SENSITIVE;
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int polarity = ACPI_ACTIVE_LOW;
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char *link = NULL;
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char link_desc[16];
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int rc;
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pin = dev->pin;
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if (!pin) {
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ACPI_DEBUG_PRINT((ACPI_DB_INFO,
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"No interrupt pin configured for device %s\n",
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pci_name(dev)));
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return 0;
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}
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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entry = acpi_pci_irq_lookup(dev, pin);
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if (!entry) {
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/*
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* IDE legacy mode controller IRQs are magic. Why do compat
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* extensions always make such a nasty mess.
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*/
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if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
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(dev->class & 0x05) == 0)
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return 0;
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}
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if (entry) {
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if (entry->link)
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gsi = acpi_pci_link_allocate_irq(entry->link,
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entry->index,
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&triggering, &polarity,
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&link);
|
|
else
|
|
gsi = entry->index;
|
|
} else
|
|
gsi = -1;
|
|
|
|
if (gsi < 0) {
|
|
/*
|
|
* No IRQ known to the ACPI subsystem - maybe the BIOS /
|
|
* driver reported one, then use it. Exit in any case.
|
|
*/
|
|
if (!acpi_pci_irq_valid(dev, pin))
|
|
return 0;
|
|
|
|
if (acpi_isa_register_gsi(dev))
|
|
dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
|
|
pin_name(pin));
|
|
|
|
kfree(entry);
|
|
return 0;
|
|
}
|
|
|
|
rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
|
|
if (rc < 0) {
|
|
dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
|
|
pin_name(pin));
|
|
kfree(entry);
|
|
return rc;
|
|
}
|
|
dev->irq = rc;
|
|
dev->irq_managed = 1;
|
|
|
|
if (link)
|
|
snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
|
|
else
|
|
link_desc[0] = '\0';
|
|
|
|
dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
|
|
pin_name(pin), link_desc, gsi,
|
|
(triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
|
|
(polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
|
|
|
|
kfree(entry);
|
|
return 0;
|
|
}
|
|
|
|
void acpi_pci_irq_disable(struct pci_dev *dev)
|
|
{
|
|
struct acpi_prt_entry *entry;
|
|
int gsi;
|
|
u8 pin;
|
|
|
|
pin = dev->pin;
|
|
if (!pin || !dev->irq_managed || dev->irq <= 0)
|
|
return;
|
|
|
|
/* Keep IOAPIC pin configuration when suspending */
|
|
if (dev->dev.power.is_prepared)
|
|
return;
|
|
#ifdef CONFIG_PM
|
|
if (dev->dev.power.runtime_status == RPM_SUSPENDING)
|
|
return;
|
|
#endif
|
|
|
|
entry = acpi_pci_irq_lookup(dev, pin);
|
|
if (!entry)
|
|
return;
|
|
|
|
if (entry->link)
|
|
gsi = acpi_pci_link_free_irq(entry->link);
|
|
else
|
|
gsi = entry->index;
|
|
|
|
kfree(entry);
|
|
|
|
/*
|
|
* TBD: It might be worth clearing dev->irq by magic constant
|
|
* (e.g. PCI_UNDEFINED_IRQ).
|
|
*/
|
|
|
|
dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
|
|
if (gsi >= 0) {
|
|
acpi_unregister_gsi(gsi);
|
|
dev->irq_managed = 0;
|
|
}
|
|
}
|