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21330497f3
On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The ADPLLs have several dividers and muxes controlled by a shared control register for each PLL. Note that for the clocks to work as device drivers for booting on dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall levels to postcore_initcall" that has already been merged. Also note that this patch does not implement clk_set_rate for the PLL, that will be posted later on when available. Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> |
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| .. | ||
| adpll.txt | ||
| apll.txt | ||
| autoidle.txt | ||
| clockdomain.txt | ||
| composite.txt | ||
| divider.txt | ||
| dpll.txt | ||
| dra7-atl.txt | ||
| fapll.txt | ||
| fixed-factor-clock.txt | ||
| gate.txt | ||
| interface.txt | ||
| mux.txt | ||