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fc94a603bb
Over the last releases we have added more and more Marvell related binding directly in the arm directory. It's time to have our proper directory inside it, and move all the files in it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org>
97 lines
2.9 KiB
Plaintext
97 lines
2.9 KiB
Plaintext
Marvell Berlin SoC Family Device Tree Bindings
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---------------------------------------------------------------
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Work in progress statement:
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Device tree files and bindings applying to Marvell Berlin SoCs and boards are
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considered "unstable". Any Marvell Berlin device tree binding may change at any
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time. Be sure to use a device tree binary and a kernel image generated from the
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same source tree.
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Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
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stable binding/ABI.
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---------------------------------------------------------------
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Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
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shall have the following properties:
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* Required root node properties:
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compatible: must contain "marvell,berlin"
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In addition, the above compatible shall be extended with the specific
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SoC and board used. Currently known SoC compatibles are:
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"marvell,berlin2" for Marvell Armada 1500 (BG2, 88DE3100),
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"marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
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"marvell,berlin2ct" for Marvell Armada ? (BG2CT, 88DE????)
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"marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
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"marvell,berlin3" for Marvell Armada ? (BG3, 88DE????)
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* Example:
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/ {
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model = "Sony NSZ-GS7";
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compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
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...
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}
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* Marvell Berlin CPU control bindings
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CPU control register allows various operations on CPUs, like resetting them
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independently.
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Required properties:
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- compatible: should be "marvell,berlin-cpu-ctrl"
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- reg: address and length of the register set
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Example:
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cpu-ctrl@f7dd0000 {
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compatible = "marvell,berlin-cpu-ctrl";
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reg = <0xf7dd0000 0x10000>;
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};
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* Marvell Berlin2 chip control binding
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Marvell Berlin SoCs have a chip control register set providing several
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individual registers dealing with pinmux, padmux, clock, reset, and secondary
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CPU boot address. Unfortunately, the individual registers are spread among the
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chip control registers, so there should be a single DT node only providing the
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different functions which are described below.
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Required properties:
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- compatible:
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* the first and second values must be:
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"simple-mfd", "syscon"
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- reg: address and length of following register sets for
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BG2/BG2CD: chip control register set
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BG2Q: chip control register set and cpu pll registers
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* Marvell Berlin2 system control binding
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Marvell Berlin SoCs have a system control register set providing several
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individual registers dealing with pinmux, padmux, and reset.
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Required properties:
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- compatible:
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* the first and second values must be:
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"simple-mfd", "syscon"
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- reg: address and length of the system control register set
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Example:
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chip: chip-control@ea0000 {
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compatible = "simple-mfd", "syscon";
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reg = <0xea0000 0x400>;
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/* sub-device nodes */
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};
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sysctrl: system-controller@d000 {
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compatible = "simple-mfd", "syscon";
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reg = <0xd000 0x100>;
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/* sub-device nodes */
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};
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