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292b293cee
PPI handling is a bit of an odd beast. It uses its own low level handling code and is hardwired to the local timers (hence lacking a registration interface). Instead, switch the low handling to the normal SPI handling code. PPIs are handled by the handle_percpu_devid_irq flow. This also allows the removal of some duplicated code. Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: David Brown <davidb@codeaurora.org> Tested-by: David Brown <davidb@codeaurora.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
55 lines
1.6 KiB
ArmAsm
55 lines
1.6 KiB
ArmAsm
/*
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* ARM Interrupt demux handler using INTC
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2008 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/entry-macro-multi.S>
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#define INTCA_BASE 0xe6980000
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#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
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#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
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#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
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#define INTLVLB_OFFS 0x00000034 /* previous priority level */
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =INTCA_BASE
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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/* The single INTFLGA read access below results in the following:
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*
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* 1. INTLVLB is updated with old priority value from INTLVLA
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* 2. Highest priority interrupt is accepted
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* 3. INTLVLA is updated to contain priority of accepted interrupt
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* 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
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*/
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ldr \irqnr, [\base, #INTFLGA_OFFS]
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/* Restore INTLVLA with the value saved in INTLVLB.
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* This is required to support interrupt priorities properly.
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*/
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ldrb \tmp, [\base, #INTLVLB_OFFS]
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strb \tmp, [\base, #INTLVLA_OFFS]
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/* Handle invalid vector number case */
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cmp \irqnr, #0
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beq 1000f
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/* Convert vector to irq number, same as the evt2irq() macro */
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lsr \irqnr, \irqnr, #0x5
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subs \irqnr, \irqnr, #16
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1000:
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.endm
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.macro test_for_ipi, irqnr, irqstat, base, tmp
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.endm
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arch_irq_handler shmobile_handle_irq_intc
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