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684653842b
This patch adds Samsung EXYNOS4212 SoC support. The EXYNOS4212 integrates a ARM Cortex A9 multi-core. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
136 lines
3.4 KiB
C
136 lines
3.4 KiB
C
/* linux/arch/arm/plat-s5p/cpu.c
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*
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* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5P CPU Support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <plat/cpu.h>
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#include <plat/s5p6440.h>
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#include <plat/s5p6450.h>
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#include <plat/s5pc100.h>
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#include <plat/s5pv210.h>
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#include <plat/exynos4.h>
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/* table of supported CPUs */
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static const char name_s5p6440[] = "S5P6440";
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static const char name_s5p6450[] = "S5P6450";
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static const char name_s5pc100[] = "S5PC100";
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static const char name_s5pv210[] = "S5PV210/S5PC110";
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static const char name_exynos4210[] = "EXYNOS4210";
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static const char name_exynos4212[] = "EXYNOS4212";
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static struct cpu_table cpu_ids[] __initdata = {
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{
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.idcode = S5P6440_CPU_ID,
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.idmask = S5P64XX_CPU_MASK,
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.map_io = s5p6440_map_io,
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.init_clocks = s5p6440_init_clocks,
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.init_uarts = s5p6440_init_uarts,
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.init = s5p64x0_init,
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.name = name_s5p6440,
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}, {
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.idcode = S5P6450_CPU_ID,
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.idmask = S5P64XX_CPU_MASK,
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.map_io = s5p6450_map_io,
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.init_clocks = s5p6450_init_clocks,
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.init_uarts = s5p6450_init_uarts,
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.init = s5p64x0_init,
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.name = name_s5p6450,
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}, {
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.idcode = S5PC100_CPU_ID,
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.idmask = S5PC100_CPU_MASK,
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.map_io = s5pc100_map_io,
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.init_clocks = s5pc100_init_clocks,
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.init_uarts = s5pc100_init_uarts,
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.init = s5pc100_init,
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.name = name_s5pc100,
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}, {
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.idcode = S5PV210_CPU_ID,
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.idmask = S5PV210_CPU_MASK,
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.map_io = s5pv210_map_io,
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.init_clocks = s5pv210_init_clocks,
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.init_uarts = s5pv210_init_uarts,
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.init = s5pv210_init,
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.name = name_s5pv210,
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}, {
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.idcode = EXYNOS4210_CPU_ID,
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.idmask = EXYNOS4_CPU_MASK,
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.map_io = exynos4_map_io,
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.init_clocks = exynos4_init_clocks,
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.init_uarts = exynos4_init_uarts,
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.init = exynos4_init,
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.name = name_exynos4210,
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}, {
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.idcode = EXYNOS4212_CPU_ID,
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.idmask = EXYNOS4_CPU_MASK,
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.map_io = exynos4_map_io,
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.init_clocks = exynos4_init_clocks,
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.init_uarts = exynos4_init_uarts,
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.init = exynos4_init,
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.name = name_exynos4212,
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},
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};
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/* minimal IO mapping */
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static struct map_desc s5p_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_CHIPID,
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.pfn = __phys_to_pfn(S5P_PA_CHIPID),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_SYS,
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.pfn = __phys_to_pfn(S5P_PA_SYSCON),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_TIMER,
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.pfn = __phys_to_pfn(S5P_PA_TIMER),
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.length = SZ_16K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_WATCHDOG,
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.pfn = __phys_to_pfn(S3C_PA_WDT),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_SROMC,
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.pfn = __phys_to_pfn(S5P_PA_SROMC),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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};
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/* read cpu identification code */
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void __init s5p_init_io(struct map_desc *mach_desc,
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int size, void __iomem *cpuid_addr)
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{
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/* initialize the io descriptors we need for initialization */
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iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
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if (mach_desc)
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iotable_init(mach_desc, size);
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/* detect cpu id and rev. */
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s5p_init_cpu(cpuid_addr);
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s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
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}
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