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67253af52e
The function get_tdp_level() provided the number of tdp level for EPT and NPT rather than the NPT specific macro. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
78 lines
1.7 KiB
C
78 lines
1.7 KiB
C
#ifndef __KVM_X86_MMU_H
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#define __KVM_X86_MMU_H
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#include <linux/kvm_host.h>
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#define PT64_PT_BITS 9
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#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
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#define PT32_PT_BITS 10
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#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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#define PT_WRITABLE_SHIFT 1
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#define PT_PRESENT_MASK (1ULL << 0)
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#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
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#define PT_USER_MASK (1ULL << 2)
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#define PT_PWT_MASK (1ULL << 3)
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#define PT_PCD_MASK (1ULL << 4)
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#define PT_ACCESSED_MASK (1ULL << 5)
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#define PT_DIRTY_MASK (1ULL << 6)
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#define PT_PAGE_SIZE_MASK (1ULL << 7)
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#define PT_PAT_MASK (1ULL << 7)
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#define PT_GLOBAL_MASK (1ULL << 8)
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#define PT64_NX_SHIFT 63
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#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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#define PT_PAT_SHIFT 7
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#define PT_DIR_PAT_SHIFT 12
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#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
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#define PT32_DIR_PSE36_SIZE 4
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#define PT32_DIR_PSE36_SHIFT 13
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#define PT32_DIR_PSE36_MASK \
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(((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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#define PT64_ROOT_LEVEL 4
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#define PT32_ROOT_LEVEL 2
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#define PT32E_ROOT_LEVEL 3
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static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
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{
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if (unlikely(vcpu->kvm->arch.n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
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__kvm_mmu_free_some_pages(vcpu);
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}
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static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)
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{
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if (likely(vcpu->arch.mmu.root_hpa != INVALID_PAGE))
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return 0;
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return kvm_mmu_load(vcpu);
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}
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static inline int is_long_mode(struct kvm_vcpu *vcpu)
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{
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#ifdef CONFIG_X86_64
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return vcpu->arch.shadow_efer & EFER_LME;
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#else
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return 0;
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#endif
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}
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static inline int is_pae(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.cr4 & X86_CR4_PAE;
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}
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static inline int is_pse(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.cr4 & X86_CR4_PSE;
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}
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static inline int is_paging(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.cr0 & X86_CR0_PG;
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}
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#endif
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