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6666cc17d7
The coherent cache version of this function already is functionally identicall to the default version, and by defining the arch_dma_coherent_to_pfn hook the same is ture for the noncoherent version as well. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
111 lines
3.3 KiB
C
111 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2004 IBM
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*
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* Implements the generic device dma API for powerpc.
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* the pci and vio busses
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*/
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/cache.h>
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/* need struct page definitions */
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-debug.h>
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#include <asm/io.h>
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#include <asm/swiotlb.h>
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/* Some dma direct funcs must be visible for use in other dma_ops */
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extern void *__dma_nommu_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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unsigned long attrs);
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extern void __dma_nommu_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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unsigned long attrs);
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int dma_nommu_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction direction,
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unsigned long attrs);
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dma_addr_t dma_nommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs);
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int dma_nommu_dma_supported(struct device *dev, u64 mask);
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u64 dma_nommu_get_required_mask(struct device *dev);
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#ifdef CONFIG_NOT_COHERENT_CACHE
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/*
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* DMA-consistent mapping functions for PowerPCs that don't support
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* cache snooping. These allocate/free a region of uncached mapped
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* memory space for use with DMA devices. Alternatively, you could
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* allocate the space "normally" and use the cache management functions
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* to ensure it is consistent.
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*/
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struct device;
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extern void __dma_sync(void *vaddr, size_t size, int direction);
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extern void __dma_sync_page(struct page *page, unsigned long offset,
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size_t size, int direction);
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extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
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#else /* ! CONFIG_NOT_COHERENT_CACHE */
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/*
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* Cache coherent cores.
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*/
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#define __dma_sync(addr, size, rw) ((void)0)
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#define __dma_sync_page(pg, off, sz, rw) ((void)0)
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#endif /* ! CONFIG_NOT_COHERENT_CACHE */
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static inline unsigned long device_to_mask(struct device *dev)
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{
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if (dev->dma_mask && *dev->dma_mask)
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return *dev->dma_mask;
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/* Assume devices without mask can take 32 bit addresses */
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return 0xfffffffful;
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}
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/*
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* Available generic sets of operations
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*/
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#ifdef CONFIG_PPC64
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extern const struct dma_map_ops dma_iommu_ops;
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#endif
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extern const struct dma_map_ops dma_nommu_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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/* We don't handle the NULL dev case for ISA for now. We could
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* do it via an out of line call but it is not needed for now. The
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* only ISA DMA device we support is the floppy and we have a hack
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* in the floppy driver directly to get a device for us.
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*/
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return NULL;
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}
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/*
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* get_dma_offset()
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*
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* Get the dma offset on configurations where the dma address can be determined
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* from the physical address by looking at a simple offset. Direct dma and
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* swiotlb use this function, but it is typically not used by implementations
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* with an iommu.
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*/
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static inline dma_addr_t get_dma_offset(struct device *dev)
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{
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if (dev)
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return dev->archdata.dma_offset;
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return PCI_DRAM_OFFSET;
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}
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static inline void set_dma_offset(struct device *dev, dma_addr_t off)
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{
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if (dev)
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dev->archdata.dma_offset = off;
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_DMA_MAPPING_H */
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