mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-21 03:33:59 +08:00
652b14aa84
Based somewhat on the PPC implementation. 32-bit processes have the heap randomized in an 8MB space, 256MB for 64-bit processes. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1479/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
463 lines
10 KiB
C
463 lines
10 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1995, 1996, 1997, 2000, 2001, 05 by Ralf Baechle
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* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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* Copyright (C) 2001 MIPS Technologies, Inc.
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*/
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#include <linux/capability.h>
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#include <linux/errno.h>
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#include <linux/linkage.h>
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#include <linux/mm.h>
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#include <linux/fs.h>
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#include <linux/smp.h>
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#include <linux/mman.h>
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#include <linux/ptrace.h>
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#include <linux/sched.h>
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#include <linux/string.h>
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#include <linux/syscalls.h>
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#include <linux/file.h>
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#include <linux/utsname.h>
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#include <linux/unistd.h>
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#include <linux/sem.h>
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#include <linux/msg.h>
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#include <linux/shm.h>
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#include <linux/compiler.h>
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#include <linux/module.h>
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#include <linux/ipc.h>
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#include <linux/uaccess.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/elf.h>
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#include <asm/asm.h>
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#include <asm/branch.h>
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#include <asm/cachectl.h>
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#include <asm/cacheflush.h>
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#include <asm/asm-offsets.h>
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#include <asm/signal.h>
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#include <asm/sim.h>
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#include <asm/shmparam.h>
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#include <asm/sysmips.h>
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#include <asm/uaccess.h>
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/*
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* For historic reasons the pipe(2) syscall on MIPS has an unusual calling
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* convention. It returns results in registers $v0 / $v1 which means there
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* is no need for it to do verify the validity of a userspace pointer
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* argument. Historically that used to be expensive in Linux. These days
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* the performance advantage is negligible.
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*/
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asmlinkage int sysm_pipe(nabi_no_regargs volatile struct pt_regs regs)
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{
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int fd[2];
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int error, res;
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error = do_pipe_flags(fd, 0);
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if (error) {
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res = error;
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goto out;
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}
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regs.regs[3] = fd[1];
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res = fd[0];
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out:
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return res;
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}
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unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
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EXPORT_SYMBOL(shm_align_mask);
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#define COLOUR_ALIGN(addr,pgoff) \
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((((addr) + shm_align_mask) & ~shm_align_mask) + \
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(((pgoff) << PAGE_SHIFT) & shm_align_mask))
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unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
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unsigned long len, unsigned long pgoff, unsigned long flags)
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{
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struct vm_area_struct * vmm;
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int do_color_align;
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unsigned long task_size;
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#ifdef CONFIG_32BIT
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task_size = TASK_SIZE;
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#else /* Must be CONFIG_64BIT*/
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task_size = test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE;
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#endif
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if (len > task_size)
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return -ENOMEM;
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if (flags & MAP_FIXED) {
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/* Even MAP_FIXED mappings must reside within task_size. */
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if (task_size - len < addr)
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return -EINVAL;
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/*
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* We do not accept a shared mapping if it would violate
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* cache aliasing constraints.
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*/
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if ((flags & MAP_SHARED) &&
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((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
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return -EINVAL;
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return addr;
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}
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do_color_align = 0;
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if (filp || (flags & MAP_SHARED))
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do_color_align = 1;
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if (addr) {
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if (do_color_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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else
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addr = PAGE_ALIGN(addr);
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vmm = find_vma(current->mm, addr);
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if (task_size - len >= addr &&
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(!vmm || addr + len <= vmm->vm_start))
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return addr;
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}
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addr = current->mm->mmap_base;
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if (do_color_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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else
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addr = PAGE_ALIGN(addr);
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for (vmm = find_vma(current->mm, addr); ; vmm = vmm->vm_next) {
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/* At this point: (!vmm || addr < vmm->vm_end). */
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if (task_size - len < addr)
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return -ENOMEM;
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if (!vmm || addr + len <= vmm->vm_start)
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return addr;
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addr = vmm->vm_end;
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if (do_color_align)
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addr = COLOUR_ALIGN(addr, pgoff);
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}
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}
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void arch_pick_mmap_layout(struct mm_struct *mm)
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{
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unsigned long random_factor = 0UL;
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if (current->flags & PF_RANDOMIZE) {
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random_factor = get_random_int();
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random_factor = random_factor << PAGE_SHIFT;
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if (TASK_IS_32BIT_ADDR)
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random_factor &= 0xfffffful;
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else
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random_factor &= 0xffffffful;
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}
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mm->mmap_base = TASK_UNMAPPED_BASE + random_factor;
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mm->get_unmapped_area = arch_get_unmapped_area;
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mm->unmap_area = arch_unmap_area;
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}
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static inline unsigned long brk_rnd(void)
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{
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unsigned long rnd = get_random_int();
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rnd = rnd << PAGE_SHIFT;
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/* 8MB for 32bit, 256MB for 64bit */
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if (TASK_IS_32BIT_ADDR)
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rnd = rnd & 0x7ffffful;
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else
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rnd = rnd & 0xffffffful;
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return rnd;
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}
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unsigned long arch_randomize_brk(struct mm_struct *mm)
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{
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unsigned long base = mm->brk;
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unsigned long ret;
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ret = PAGE_ALIGN(base + brk_rnd());
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if (ret < mm->brk)
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return mm->brk;
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return ret;
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}
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SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len,
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unsigned long, prot, unsigned long, flags, unsigned long,
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fd, off_t, offset)
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{
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unsigned long result;
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result = -EINVAL;
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if (offset & ~PAGE_MASK)
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goto out;
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result = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
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out:
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return result;
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}
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SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len,
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unsigned long, prot, unsigned long, flags, unsigned long, fd,
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unsigned long, pgoff)
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{
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if (pgoff & (~PAGE_MASK >> 12))
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return -EINVAL;
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return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12));
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}
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save_static_function(sys_fork);
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static int __used noinline
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_sys_fork(nabi_no_regargs struct pt_regs regs)
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{
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return do_fork(SIGCHLD, regs.regs[29], ®s, 0, NULL, NULL);
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}
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save_static_function(sys_clone);
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static int __used noinline
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_sys_clone(nabi_no_regargs struct pt_regs regs)
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{
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unsigned long clone_flags;
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unsigned long newsp;
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int __user *parent_tidptr, *child_tidptr;
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clone_flags = regs.regs[4];
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newsp = regs.regs[5];
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if (!newsp)
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newsp = regs.regs[29];
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parent_tidptr = (int __user *) regs.regs[6];
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#ifdef CONFIG_32BIT
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/* We need to fetch the fifth argument off the stack. */
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child_tidptr = NULL;
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if (clone_flags & (CLONE_CHILD_SETTID | CLONE_CHILD_CLEARTID)) {
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int __user *__user *usp = (int __user *__user *) regs.regs[29];
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if (regs.regs[2] == __NR_syscall) {
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if (get_user (child_tidptr, &usp[5]))
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return -EFAULT;
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}
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else if (get_user (child_tidptr, &usp[4]))
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return -EFAULT;
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}
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#else
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child_tidptr = (int __user *) regs.regs[8];
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#endif
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return do_fork(clone_flags, newsp, ®s, 0,
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parent_tidptr, child_tidptr);
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}
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/*
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* sys_execve() executes a new program.
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*/
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asmlinkage int sys_execve(nabi_no_regargs struct pt_regs regs)
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{
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int error;
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char * filename;
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filename = getname((char __user *) (long)regs.regs[4]);
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error = PTR_ERR(filename);
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if (IS_ERR(filename))
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goto out;
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error = do_execve(filename, (char __user *__user *) (long)regs.regs[5],
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(char __user *__user *) (long)regs.regs[6], ®s);
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putname(filename);
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out:
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return error;
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}
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SYSCALL_DEFINE1(set_thread_area, unsigned long, addr)
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{
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struct thread_info *ti = task_thread_info(current);
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ti->tp_value = addr;
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if (cpu_has_userlocal)
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write_c0_userlocal(addr);
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return 0;
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}
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static inline int mips_atomic_set(struct pt_regs *regs,
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unsigned long addr, unsigned long new)
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{
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unsigned long old, tmp;
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unsigned int err;
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if (unlikely(addr & 3))
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return -EINVAL;
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if (unlikely(!access_ok(VERIFY_WRITE, addr, 4)))
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return -EINVAL;
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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" .set mips3 \n"
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" li %[err], 0 \n"
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"1: ll %[old], (%[addr]) \n"
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" move %[tmp], %[new] \n"
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"2: sc %[tmp], (%[addr]) \n"
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" beqzl %[tmp], 1b \n"
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"3: \n"
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" .section .fixup,\"ax\" \n"
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"4: li %[err], %[efault] \n"
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" j 3b \n"
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" .previous \n"
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" .section __ex_table,\"a\" \n"
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" "STR(PTR)" 1b, 4b \n"
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" "STR(PTR)" 2b, 4b \n"
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" .previous \n"
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" .set mips0 \n"
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: [old] "=&r" (old),
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[err] "=&r" (err),
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[tmp] "=&r" (tmp)
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: [addr] "r" (addr),
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[new] "r" (new),
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[efault] "i" (-EFAULT)
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: "memory");
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} else if (cpu_has_llsc) {
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__asm__ __volatile__ (
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" .set mips3 \n"
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" li %[err], 0 \n"
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"1: ll %[old], (%[addr]) \n"
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" move %[tmp], %[new] \n"
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"2: sc %[tmp], (%[addr]) \n"
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" bnez %[tmp], 4f \n"
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"3: \n"
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" .subsection 2 \n"
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"4: b 1b \n"
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" .previous \n"
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" \n"
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" .section .fixup,\"ax\" \n"
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"5: li %[err], %[efault] \n"
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" j 3b \n"
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" .previous \n"
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" .section __ex_table,\"a\" \n"
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" "STR(PTR)" 1b, 5b \n"
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" "STR(PTR)" 2b, 5b \n"
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" .previous \n"
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" .set mips0 \n"
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: [old] "=&r" (old),
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[err] "=&r" (err),
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[tmp] "=&r" (tmp)
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: [addr] "r" (addr),
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[new] "r" (new),
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[efault] "i" (-EFAULT)
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: "memory");
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} else {
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do {
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preempt_disable();
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ll_bit = 1;
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ll_task = current;
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preempt_enable();
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err = __get_user(old, (unsigned int *) addr);
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err |= __put_user(new, (unsigned int *) addr);
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if (err)
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break;
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rmb();
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} while (!ll_bit);
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}
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if (unlikely(err))
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return err;
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regs->regs[2] = old;
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regs->regs[7] = 0; /* No error */
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/*
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* Don't let your children do this ...
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*/
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__asm__ __volatile__(
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" move $29, %0 \n"
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" j syscall_exit \n"
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: /* no outputs */
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: "r" (regs));
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/* unreached. Honestly. */
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while (1);
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}
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save_static_function(sys_sysmips);
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static int __used noinline
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_sys_sysmips(nabi_no_regargs struct pt_regs regs)
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{
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long cmd, arg1, arg2, arg3;
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cmd = regs.regs[4];
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arg1 = regs.regs[5];
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arg2 = regs.regs[6];
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arg3 = regs.regs[7];
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switch (cmd) {
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case MIPS_ATOMIC_SET:
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return mips_atomic_set(®s, arg1, arg2);
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case MIPS_FIXADE:
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if (arg1 & ~3)
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return -EINVAL;
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if (arg1 & 1)
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set_thread_flag(TIF_FIXADE);
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else
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clear_thread_flag(TIF_FIXADE);
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if (arg1 & 2)
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set_thread_flag(TIF_LOGADE);
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else
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clear_thread_flag(TIF_FIXADE);
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return 0;
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case FLUSH_CACHE:
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__flush_cache_all();
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return 0;
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}
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return -EINVAL;
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}
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/*
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* No implemented yet ...
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*/
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SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op)
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{
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return -ENOSYS;
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}
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/*
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* If we ever come here the user sp is bad. Zap the process right away.
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* Due to the bad stack signaling wouldn't work.
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*/
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asmlinkage void bad_stack(void)
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{
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do_exit(SIGSEGV);
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}
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/*
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* Do a system call from kernel instead of calling sys_execve so we
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* end up with proper pt_regs.
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*/
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int kernel_execve(const char *filename, char *const argv[], char *const envp[])
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{
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register unsigned long __a0 asm("$4") = (unsigned long) filename;
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register unsigned long __a1 asm("$5") = (unsigned long) argv;
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register unsigned long __a2 asm("$6") = (unsigned long) envp;
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register unsigned long __a3 asm("$7");
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unsigned long __v0;
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__asm__ volatile (" \n"
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" .set noreorder \n"
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" li $2, %5 # __NR_execve \n"
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" syscall \n"
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" move %0, $2 \n"
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" .set reorder \n"
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: "=&r" (__v0), "=r" (__a3)
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: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_execve)
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24",
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"memory");
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if (__a3 == 0)
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return __v0;
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return -__v0;
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}
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