mirror of
https://github.com/edk2-porting/linux-next.git
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64e9ee3095
Add HW breakpoints into the arch specific portion of x86 kgdb. In the current x86 kernel.org kernels HW breakpoints are changed out in lazy fashion because there is no infrastructure around changing them when changing to a kernel task or entering the kernel mode via a system call. This lazy approach means that if a user process uses HW breakpoints the kgdb will loose out. This is an acceptable trade off because the developer debugging the kernel is assumed to know what is going on system wide and would be aware of this trade off. There is a minor bug fix to the kgdb core so as to correctly call the hw breakpoint functions with a valid value from the enum. There is also a minor change to the x86_64 startup code when using early HW breakpoints. When the debugger is connected, the cpu startup code must not zero out the HW breakpoint registers or you cannot hit the breakpoints you are interested in, in the first place. Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
361 lines
9.0 KiB
C
361 lines
9.0 KiB
C
/*
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* X86-64 specific CPU setup.
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* Copyright (C) 1995 Linus Torvalds
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* Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
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* See setup.c for older changelog.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/bitops.h>
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#include <linux/module.h>
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#include <linux/kgdb.h>
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#include <asm/pda.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/desc.h>
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#include <asm/atomic.h>
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#include <asm/mmu_context.h>
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#include <asm/smp.h>
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#include <asm/i387.h>
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#include <asm/percpu.h>
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#include <asm/proto.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#ifndef CONFIG_DEBUG_BOOT_PARAMS
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struct boot_params __initdata boot_params;
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#else
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struct boot_params boot_params;
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#endif
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cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
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struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
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EXPORT_SYMBOL(_cpu_pda);
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struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
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struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
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char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
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unsigned long __supported_pte_mask __read_mostly = ~0UL;
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EXPORT_SYMBOL_GPL(__supported_pte_mask);
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static int do_not_nx __cpuinitdata = 0;
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/* noexec=on|off
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Control non executable mappings for 64bit processes.
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on Enable(default)
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off Disable
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*/
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static int __init nonx_setup(char *str)
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{
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if (!str)
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return -EINVAL;
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if (!strncmp(str, "on", 2)) {
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__supported_pte_mask |= _PAGE_NX;
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do_not_nx = 0;
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} else if (!strncmp(str, "off", 3)) {
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do_not_nx = 1;
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__supported_pte_mask &= ~_PAGE_NX;
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}
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return 0;
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}
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early_param("noexec", nonx_setup);
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int force_personality32 = 0;
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/* noexec32=on|off
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Control non executable heap for 32bit processes.
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To control the stack too use noexec=off
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on PROT_READ does not imply PROT_EXEC for 32bit processes
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off PROT_READ implies PROT_EXEC (default)
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*/
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static int __init nonx32_setup(char *str)
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{
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if (!strcmp(str, "on"))
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force_personality32 &= ~READ_IMPLIES_EXEC;
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else if (!strcmp(str, "off"))
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force_personality32 |= READ_IMPLIES_EXEC;
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return 1;
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}
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__setup("noexec32=", nonx32_setup);
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/*
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* Copy data used in early init routines from the initial arrays to the
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* per cpu data areas. These arrays then become expendable and the
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* *_early_ptr's are zeroed indicating that the static arrays are gone.
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*/
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static void __init setup_per_cpu_maps(void)
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{
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int cpu;
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for_each_possible_cpu(cpu) {
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#ifdef CONFIG_SMP
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if (per_cpu_offset(cpu)) {
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#endif
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per_cpu(x86_cpu_to_apicid, cpu) =
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x86_cpu_to_apicid_init[cpu];
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per_cpu(x86_bios_cpu_apicid, cpu) =
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x86_bios_cpu_apicid_init[cpu];
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#ifdef CONFIG_NUMA
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per_cpu(x86_cpu_to_node_map, cpu) =
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x86_cpu_to_node_map_init[cpu];
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#endif
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#ifdef CONFIG_SMP
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}
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else
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printk(KERN_NOTICE "per_cpu_offset zero for cpu %d\n",
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cpu);
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#endif
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}
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/* indicate the early static arrays will soon be gone */
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x86_cpu_to_apicid_early_ptr = NULL;
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x86_bios_cpu_apicid_early_ptr = NULL;
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#ifdef CONFIG_NUMA
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x86_cpu_to_node_map_early_ptr = NULL;
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#endif
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}
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/*
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* Great future plan:
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* Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
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* Always point %gs to its beginning
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*/
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void __init setup_per_cpu_areas(void)
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{
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int i;
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unsigned long size;
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#ifdef CONFIG_HOTPLUG_CPU
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prefill_possible_map();
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#endif
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/* Copy section for each CPU (we discard the original) */
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size = PERCPU_ENOUGH_ROOM;
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printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
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for_each_cpu_mask (i, cpu_possible_map) {
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char *ptr;
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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ptr = alloc_bootmem_pages(size);
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#else
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int node = early_cpu_to_node(i);
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if (!node_online(node) || !NODE_DATA(node))
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ptr = alloc_bootmem_pages(size);
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else
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ptr = alloc_bootmem_pages_node(NODE_DATA(node), size);
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#endif
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if (!ptr)
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panic("Cannot allocate cpu data for CPU %d\n", i);
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cpu_pda(i)->data_offset = ptr - __per_cpu_start;
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memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
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}
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/* setup percpu data maps early */
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setup_per_cpu_maps();
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}
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void pda_init(int cpu)
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{
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struct x8664_pda *pda = cpu_pda(cpu);
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/* Setup up data that may be needed in __get_free_pages early */
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asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
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/* Memory clobbers used to order PDA accessed */
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mb();
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wrmsrl(MSR_GS_BASE, pda);
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mb();
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pda->cpunumber = cpu;
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pda->irqcount = -1;
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pda->kernelstack =
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(unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
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pda->active_mm = &init_mm;
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pda->mmu_state = 0;
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if (cpu == 0) {
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/* others are initialized in smpboot.c */
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pda->pcurrent = &init_task;
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pda->irqstackptr = boot_cpu_stack;
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} else {
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pda->irqstackptr = (char *)
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__get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
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if (!pda->irqstackptr)
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panic("cannot allocate irqstack for cpu %d", cpu);
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}
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pda->irqstackptr += IRQSTACKSIZE-64;
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}
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char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
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__attribute__((section(".bss.page_aligned")));
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extern asmlinkage void ignore_sysret(void);
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/* May not be marked __init: used by software suspend */
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void syscall_init(void)
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{
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/*
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* LSTAR and STAR live in a bit strange symbiosis.
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* They both write to the same internal register. STAR allows to set CS/DS
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* but only a 32bit target. LSTAR sets the 64bit rip.
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*/
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wrmsrl(MSR_STAR, ((u64)__USER32_CS)<<48 | ((u64)__KERNEL_CS)<<32);
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wrmsrl(MSR_LSTAR, system_call);
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wrmsrl(MSR_CSTAR, ignore_sysret);
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#ifdef CONFIG_IA32_EMULATION
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syscall32_cpu_init ();
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#endif
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/* Flags to clear on syscall */
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wrmsrl(MSR_SYSCALL_MASK,
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X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
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}
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void __cpuinit check_efer(void)
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{
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unsigned long efer;
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rdmsrl(MSR_EFER, efer);
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if (!(efer & EFER_NX) || do_not_nx) {
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__supported_pte_mask &= ~_PAGE_NX;
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}
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}
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unsigned long kernel_eflags;
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/*
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* Copies of the original ist values from the tss are only accessed during
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* debugging, no special alignment required.
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*/
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DEFINE_PER_CPU(struct orig_ist, orig_ist);
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/*
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* cpu_init() initializes state that is per-CPU. Some data is already
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* initialized (naturally) in the bootstrap process, such as the GDT
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* and IDT. We reload them nevertheless, this function acts as a
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* 'CPU state barrier', nothing should get across.
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* A lot of state is already set up in PDA init.
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*/
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void __cpuinit cpu_init (void)
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{
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int cpu = stack_smp_processor_id();
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struct tss_struct *t = &per_cpu(init_tss, cpu);
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struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
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unsigned long v;
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char *estacks = NULL;
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struct task_struct *me;
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int i;
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/* CPU 0 is initialised in head64.c */
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if (cpu != 0) {
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pda_init(cpu);
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} else
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estacks = boot_exception_stacks;
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me = current;
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if (cpu_test_and_set(cpu, cpu_initialized))
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panic("CPU#%d already initialized!\n", cpu);
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printk("Initializing CPU#%d\n", cpu);
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clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
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/*
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* Initialize the per-CPU GDT with the boot GDT,
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* and set up the GDT descriptor:
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*/
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if (cpu)
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memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
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cpu_gdt_descr[cpu].size = GDT_SIZE;
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load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
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load_idt((const struct desc_ptr *)&idt_descr);
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memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
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syscall_init();
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wrmsrl(MSR_FS_BASE, 0);
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wrmsrl(MSR_KERNEL_GS_BASE, 0);
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barrier();
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check_efer();
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/*
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* set up and load the per-CPU TSS
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*/
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for (v = 0; v < N_EXCEPTION_STACKS; v++) {
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static const unsigned int order[N_EXCEPTION_STACKS] = {
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[0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
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[DEBUG_STACK - 1] = DEBUG_STACK_ORDER
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};
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if (cpu) {
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estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
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if (!estacks)
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panic("Cannot allocate exception stack %ld %d\n",
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v, cpu);
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}
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estacks += PAGE_SIZE << order[v];
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orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
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}
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t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
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/*
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* <= is required because the CPU will access up to
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* 8 bits beyond the end of the IO permission bitmap.
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*/
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for (i = 0; i <= IO_BITMAP_LONGS; i++)
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t->io_bitmap[i] = ~0UL;
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atomic_inc(&init_mm.mm_count);
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me->active_mm = &init_mm;
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if (me->mm)
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BUG();
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enter_lazy_tlb(&init_mm, me);
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set_tss_desc(cpu, t);
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load_TR_desc();
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load_LDT(&init_mm.context);
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#ifdef CONFIG_KGDB
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/*
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* If the kgdb is connected no debug regs should be altered. This
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* is only applicable when KGDB and a KGDB I/O module are built
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* into the kernel and you are using early debugging with
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* kgdbwait. KGDB will control the kernel HW breakpoint registers.
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*/
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if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
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arch_kgdb_ops.correct_hw_break();
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else {
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#endif
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/*
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* Clear all 6 debug registers:
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*/
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set_debugreg(0UL, 0);
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set_debugreg(0UL, 1);
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set_debugreg(0UL, 2);
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set_debugreg(0UL, 3);
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set_debugreg(0UL, 6);
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set_debugreg(0UL, 7);
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#ifdef CONFIG_KGDB
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/* If the kgdb is connected no debug regs should be altered. */
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}
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#endif
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fpu_init();
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raw_local_save_flags(kernel_eflags);
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}
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