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2ae111cdd8
64bit mode APIC interrupt handlers are set within irqinit_64.c. Lets do tha same for 32bit mode which would help in furter code merging. Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
164 lines
4.0 KiB
C
164 lines
4.0 KiB
C
#include <linux/errno.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/random.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/sysdev.h>
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#include <linux/bitops.h>
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#include <asm/atomic.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/timer.h>
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#include <asm/pgtable.h>
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#include <asm/delay.h>
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#include <asm/desc.h>
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#include <asm/apic.h>
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#include <asm/arch_hooks.h>
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#include <asm/i8259.h>
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/*
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* Note that on a 486, we don't want to do a SIGFPE on an irq13
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* as the irq is unreliable, and exception 16 works correctly
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* (ie as explained in the intel literature). On a 386, you
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* can't use exception 16 due to bad IBM design, so we have to
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* rely on the less exact irq13.
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*
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* Careful.. Not only is IRQ13 unreliable, but it is also
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* leads to races. IBM designers who came up with it should
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* be shot.
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*/
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static irqreturn_t math_error_irq(int cpl, void *dev_id)
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{
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extern void math_error(void __user *);
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outb(0,0xF0);
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if (ignore_fpu_irq || !boot_cpu_data.hard_math)
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return IRQ_NONE;
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math_error((void __user *)get_irq_regs()->ip);
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return IRQ_HANDLED;
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}
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/*
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* New motherboards sometimes make IRQ 13 be a PCI interrupt,
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* so allow interrupt sharing.
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*/
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static struct irqaction fpu_irq = {
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.handler = math_error_irq,
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.mask = CPU_MASK_NONE,
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.name = "fpu",
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};
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void __init init_ISA_irqs (void)
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{
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int i;
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#ifdef CONFIG_X86_LOCAL_APIC
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init_bsp_APIC();
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#endif
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init_8259A(0);
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/*
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* 16 old-style INTA-cycle interrupts:
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*/
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for (i = 0; i < 16; i++) {
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set_irq_chip_and_handler_name(i, &i8259A_chip,
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handle_level_irq, "XT");
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}
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = {
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.handler = no_action,
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.mask = CPU_MASK_NONE,
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.name = "cascade",
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};
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/* Overridden in paravirt.c */
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void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
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void __init native_init_IRQ(void)
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{
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int i;
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/* all the set up before the call gates are initialised */
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pre_intr_init_hook();
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/*
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* Cover the whole vector space, no vector can escape
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* us. (some of these will be overridden and become
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* 'special' SMP interrupts)
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*/
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for (i = 0; i < (NR_VECTORS - FIRST_EXTERNAL_VECTOR); i++) {
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int vector = FIRST_EXTERNAL_VECTOR + i;
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if (i >= NR_IRQS)
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break;
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/* SYSCALL_VECTOR was reserved in trap_init. */
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if (!test_bit(vector, used_vectors))
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set_intr_gate(vector, interrupt[i]);
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}
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP)
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/*
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* IRQ0 must be given a fixed assignment and initialized,
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* because it's used before the IO-APIC is set up.
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*/
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set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
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/*
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* The reschedule interrupt is a CPU-to-CPU reschedule-helper
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* IPI, driven by wakeup.
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*/
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alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
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/* IPI for invalidation */
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alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
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/* IPI for generic function call */
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alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
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/* IPI for single call function */
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set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt);
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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/* self generated IPI for local APIC timer */
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alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
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/* IPI vectors for APIC spurious and error interrupts */
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alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
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alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
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#endif
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#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
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/* thermal monitor LVT interrupt */
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alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
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#endif
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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/* setup after call gates are initialised (usually add in
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* the architecture specific gates)
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*/
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intr_init_hook();
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/*
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* External FPU? Set up irq13 if so, for
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* original braindamaged IBM FERR coupling.
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*/
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if (boot_cpu_data.hard_math && !cpu_has_fpu)
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setup_irq(FPU_IRQ, &fpu_irq);
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irq_ctx_init(smp_processor_id());
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}
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