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linux-next/arch/arm/boot/dts/kirkwood-sheevaplug-common.dtsi
Sebastian Hesselbarth cbfaea96ac ARM: dts: kirkwood: set default pinctrl for NAND
There is only one valid pinctrl setting for NAND on Kirkwood. Now that we
have the setting in the common SoC pinctrl, move it to the NAND controller
node directly and remove it from the individual boards.

While at it, also fix up status = "okay" to "ok" on one board's NAND node.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-12-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-05 00:53:06 +00:00

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/*
* kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
*
* Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
*
* Licensed under GPLv2
*/
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
};
ocp@f1000000 {
pinctrl: pin-controller@10000 {
pmx_usb_power_enable: pmx-usb-power-enable {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_led_red: pmx-led-red {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
pmx_led_blue: pmx-led-blue {
marvell,pins = "mpp49";
marvell,function = "gpio";
};
pmx_sdio_cd: pmx-sdio-cd {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
pmx_sdio_wp: pmx-sdio-wp {
marvell,pins = "mpp47";
marvell,function = "gpio";
};
};
serial@12000 {
status = "okay";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_usb_power_enable>;
pinctrl-names = "default";
usb_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 29 0>;
};
};
};
&nand {
status = "okay";
partition@0 {
label = "u-boot";
reg = <0x0000000 0x100000>;
};
partition@100000 {
label = "uImage";
reg = <0x0100000 0x400000>;
};
partition@500000 {
label = "root";
reg = <0x0500000 0x1fb00000>;
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};