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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
263 lines
7.6 KiB
C
263 lines
7.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2009-2010 Pengutronix
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* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
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*/
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#ifndef __LINUX_MFD_MC13XXX_H
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#define __LINUX_MFD_MC13XXX_H
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#include <linux/interrupt.h>
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struct mc13xxx;
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void mc13xxx_lock(struct mc13xxx *mc13xxx);
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void mc13xxx_unlock(struct mc13xxx *mc13xxx);
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int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val);
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int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val);
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int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
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u32 mask, u32 val);
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int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
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irq_handler_t handler, const char *name, void *dev);
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int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev);
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int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
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int *enabled, int *pending);
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int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
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int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
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unsigned int mode, unsigned int channel,
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u8 ato, bool atox, unsigned int *sample);
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/* Deprecated calls */
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static inline int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq)
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{
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return 0;
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}
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static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
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irq_handler_t handler,
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const char *name, void *dev)
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{
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return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev);
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}
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int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
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int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
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#define MC13783_AUDIO_RX0 36
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#define MC13783_AUDIO_RX1 37
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#define MC13783_AUDIO_TX 38
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#define MC13783_SSI_NETWORK 39
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#define MC13783_AUDIO_CODEC 40
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#define MC13783_AUDIO_DAC 41
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#define MC13XXX_IRQ_ADCDONE 0
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#define MC13XXX_IRQ_ADCBISDONE 1
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#define MC13XXX_IRQ_TS 2
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#define MC13XXX_IRQ_CHGDET 6
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#define MC13XXX_IRQ_CHGREV 8
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#define MC13XXX_IRQ_CHGSHORT 9
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#define MC13XXX_IRQ_CCCV 10
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#define MC13XXX_IRQ_CHGCURR 11
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#define MC13XXX_IRQ_BPON 12
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#define MC13XXX_IRQ_LOBATL 13
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#define MC13XXX_IRQ_LOBATH 14
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#define MC13XXX_IRQ_1HZ 24
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#define MC13XXX_IRQ_TODA 25
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#define MC13XXX_IRQ_SYSRST 30
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#define MC13XXX_IRQ_RTCRST 31
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#define MC13XXX_IRQ_PC 32
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#define MC13XXX_IRQ_WARM 33
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#define MC13XXX_IRQ_MEMHLD 34
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#define MC13XXX_IRQ_THWARNL 36
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#define MC13XXX_IRQ_THWARNH 37
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#define MC13XXX_IRQ_CLK 38
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struct regulator_init_data;
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struct mc13xxx_regulator_init_data {
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int id;
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struct regulator_init_data *init_data;
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struct device_node *node;
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};
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struct mc13xxx_regulator_platform_data {
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int num_regulators;
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struct mc13xxx_regulator_init_data *regulators;
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};
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enum {
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/* MC13783 LED IDs */
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MC13783_LED_MD,
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MC13783_LED_AD,
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MC13783_LED_KP,
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MC13783_LED_R1,
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MC13783_LED_G1,
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MC13783_LED_B1,
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MC13783_LED_R2,
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MC13783_LED_G2,
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MC13783_LED_B2,
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MC13783_LED_R3,
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MC13783_LED_G3,
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MC13783_LED_B3,
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/* MC13892 LED IDs */
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MC13892_LED_MD,
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MC13892_LED_AD,
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MC13892_LED_KP,
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MC13892_LED_R,
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MC13892_LED_G,
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MC13892_LED_B,
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/* MC34708 LED IDs */
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MC34708_LED_R,
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MC34708_LED_G,
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};
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struct mc13xxx_led_platform_data {
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int id;
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const char *name;
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const char *default_trigger;
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};
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#define MAX_LED_CONTROL_REGS 6
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/* MC13783 LED Control 0 */
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#define MC13783_LED_C0_ENABLE (1 << 0)
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#define MC13783_LED_C0_TRIODE_MD (1 << 7)
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#define MC13783_LED_C0_TRIODE_AD (1 << 8)
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#define MC13783_LED_C0_TRIODE_KP (1 << 9)
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#define MC13783_LED_C0_BOOST (1 << 10)
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#define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11)
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#define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14)
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/* MC13783 LED Control 1 */
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#define MC13783_LED_C1_TC1HALF (1 << 18)
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#define MC13783_LED_C1_SLEWLIM (1 << 23)
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/* MC13783 LED Control 2 */
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#define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0)
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#define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3)
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#define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6)
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#define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21)
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#define MC13783_LED_C2_SLEWLIM (1 << 23)
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/* MC13783 LED Control 3 */
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#define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0)
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#define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2)
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#define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4)
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#define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21)
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#define MC13783_LED_C3_TRIODE_TC1 (1 << 23)
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/* MC13783 LED Control 4 */
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#define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0)
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#define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2)
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#define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4)
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#define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21)
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#define MC13783_LED_C4_TRIODE_TC2 (1 << 23)
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/* MC13783 LED Control 5 */
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#define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0)
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#define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2)
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#define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4)
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#define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21)
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#define MC13783_LED_C5_TRIODE_TC3 (1 << 23)
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/* MC13892 LED Control 0 */
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#define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9)
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#define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21)
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/* MC13892 LED Control 1 */
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#define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9)
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/* MC13892 LED Control 2 */
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#define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9)
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#define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21)
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/* MC13892 LED Control 3 */
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#define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9)
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/* MC34708 LED Control 0 */
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#define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9)
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#define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21)
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struct mc13xxx_leds_platform_data {
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struct mc13xxx_led_platform_data *led;
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int num_leds;
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u32 led_control[MAX_LED_CONTROL_REGS];
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};
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#define MC13783_BUTTON_DBNC_0MS 0
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#define MC13783_BUTTON_DBNC_30MS 1
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#define MC13783_BUTTON_DBNC_150MS 2
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#define MC13783_BUTTON_DBNC_750MS 3
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#define MC13783_BUTTON_ENABLE (1 << 2)
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#define MC13783_BUTTON_POL_INVERT (1 << 3)
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#define MC13783_BUTTON_RESET_EN (1 << 4)
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struct mc13xxx_buttons_platform_data {
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int b1on_flags;
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unsigned short b1on_key;
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int b2on_flags;
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unsigned short b2on_key;
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int b3on_flags;
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unsigned short b3on_key;
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};
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#define MC13783_TS_ATO_FIRST false
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#define MC13783_TS_ATO_EACH true
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struct mc13xxx_ts_platform_data {
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/* Delay between Touchscreen polarization and ADC Conversion.
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* Given in clock ticks of a 32 kHz clock which gives a granularity of
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* about 30.5ms */
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u8 ato;
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/* Use the ATO delay only for the first conversion or for each one */
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bool atox;
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};
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enum mc13783_ssi_port {
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MC13783_SSI1_PORT,
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MC13783_SSI2_PORT,
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};
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struct mc13xxx_codec_platform_data {
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enum mc13783_ssi_port adc_ssi_port;
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enum mc13783_ssi_port dac_ssi_port;
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};
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#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
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#define MC13XXX_USE_CODEC (1 << 1)
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#define MC13XXX_USE_ADC (1 << 2)
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#define MC13XXX_USE_RTC (1 << 3)
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struct mc13xxx_platform_data {
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unsigned int flags;
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struct mc13xxx_regulator_platform_data regulators;
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struct mc13xxx_leds_platform_data *leds;
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struct mc13xxx_buttons_platform_data *buttons;
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struct mc13xxx_ts_platform_data touch;
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struct mc13xxx_codec_platform_data *codec;
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};
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#define MC13XXX_ADC_MODE_TS 1
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#define MC13XXX_ADC_MODE_SINGLE_CHAN 2
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#define MC13XXX_ADC_MODE_MULT_CHAN 3
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#define MC13XXX_ADC0 43
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#define MC13XXX_ADC0_LICELLCON (1 << 0)
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#define MC13XXX_ADC0_CHRGICON (1 << 1)
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#define MC13XXX_ADC0_BATICON (1 << 2)
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#define MC13XXX_ADC0_ADIN7SEL_DIE (1 << 4)
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#define MC13XXX_ADC0_ADIN7SEL_UID (2 << 4)
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#define MC13XXX_ADC0_ADREFEN (1 << 10)
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#define MC13XXX_ADC0_TSMOD0 (1 << 12)
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#define MC13XXX_ADC0_TSMOD1 (1 << 13)
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#define MC13XXX_ADC0_TSMOD2 (1 << 14)
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#define MC13XXX_ADC0_CHRGRAWDIV (1 << 15)
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#define MC13XXX_ADC0_ADINC1 (1 << 16)
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#define MC13XXX_ADC0_ADINC2 (1 << 17)
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#define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \
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MC13XXX_ADC0_TSMOD1 | \
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MC13XXX_ADC0_TSMOD2)
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#define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \
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MC13XXX_ADC0_LICELLCON | \
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MC13XXX_ADC0_CHRGICON | \
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MC13XXX_ADC0_BATICON)
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#endif /* ifndef __LINUX_MFD_MC13XXX_H */
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