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ee1ae4d7b1
This iomux file has been constructed from the Freescale pinmux tool. It contains all pins from the tool, but the datasheet lists some configurations not present in the tool, these are not yet added. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
365 lines
9.0 KiB
C
365 lines
9.0 KiB
C
/*
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* Copyright (C) 2010 Linaro Limited
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*
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* based on code from the following
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* Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
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* Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <linux/input.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/fsl_devices.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/spi.h>
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#include <mach/common.h>
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#include <mach/hardware.h>
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#include <mach/iomux-mx51.h>
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#include <mach/i2c.h>
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#include <mach/mxc_ehci.h>
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#include <asm/irq.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include "devices-imx51.h"
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#include "devices.h"
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#define MX51_USB_PLL_DIV_24_MHZ 0x01
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#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16)
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#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17)
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#define EFIKAMX_PCBID2 IMX_GPIO_NR(3, 11)
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#define EFIKAMX_BLUE_LED IMX_GPIO_NR(3, 13)
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#define EFIKAMX_GREEN_LED IMX_GPIO_NR(3, 14)
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#define EFIKAMX_RED_LED IMX_GPIO_NR(3, 15)
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#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31)
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#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24)
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#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25)
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/* board 1.1 doesn't have same reset gpio */
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#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2)
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#define EFIKAMX_RESET IMX_GPIO_NR(1, 4)
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/* the pci ids pin have pull up. they're driven low according to board id */
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#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
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#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
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static iomux_v3_cfg_t mx51efikamx_pads[] = {
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/* UART1 */
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MX51_PAD_UART1_RXD__UART1_RXD,
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MX51_PAD_UART1_TXD__UART1_TXD,
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MX51_PAD_UART1_RTS__UART1_RTS,
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MX51_PAD_UART1_CTS__UART1_CTS,
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/* board id */
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MX51_PAD_PCBID0,
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MX51_PAD_PCBID1,
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MX51_PAD_PCBID2,
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/* SD 1 */
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MX51_PAD_SD1_CMD__SD1_CMD,
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MX51_PAD_SD1_CLK__SD1_CLK,
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MX51_PAD_SD1_DATA0__SD1_DATA0,
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MX51_PAD_SD1_DATA1__SD1_DATA1,
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MX51_PAD_SD1_DATA2__SD1_DATA2,
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MX51_PAD_SD1_DATA3__SD1_DATA3,
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/* SD 2 */
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MX51_PAD_SD2_CMD__SD2_CMD,
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MX51_PAD_SD2_CLK__SD2_CLK,
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MX51_PAD_SD2_DATA0__SD2_DATA0,
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MX51_PAD_SD2_DATA1__SD2_DATA1,
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MX51_PAD_SD2_DATA2__SD2_DATA2,
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MX51_PAD_SD2_DATA3__SD2_DATA3,
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/* SD/MMC WP/CD */
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MX51_PAD_GPIO1_0__SD1_CD,
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MX51_PAD_GPIO1_1__SD1_WP,
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MX51_PAD_GPIO1_7__SD2_WP,
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MX51_PAD_GPIO1_8__SD2_CD,
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/* leds */
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MX51_PAD_CSI1_D9__GPIO3_13,
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MX51_PAD_CSI1_VSYNC__GPIO3_14,
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MX51_PAD_CSI1_HSYNC__GPIO3_15,
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/* power key */
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MX51_PAD_PWRKEY,
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/* spi */
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MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
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MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
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MX51_PAD_CSPI1_SS0__GPIO4_24,
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MX51_PAD_CSPI1_SS1__GPIO4_25,
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MX51_PAD_CSPI1_RDY__ECSPI1_RDY,
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MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
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/* reset */
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MX51_PAD_DI1_PIN13__GPIO3_2,
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MX51_PAD_GPIO1_4__GPIO1_4,
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};
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/* Serial ports */
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#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
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static const struct imxuart_platform_data uart_pdata = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static inline void mxc_init_imx_uart(void)
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{
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imx51_add_imx_uart(0, &uart_pdata);
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imx51_add_imx_uart(1, &uart_pdata);
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imx51_add_imx_uart(2, &uart_pdata);
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}
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#else /* !SERIAL_IMX */
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static inline void mxc_init_imx_uart(void)
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{
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}
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#endif /* SERIAL_IMX */
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/* This function is board specific as the bit mask for the plldiv will also
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* be different for other Freescale SoCs, thus a common bitmask is not
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* possible and cannot get place in /plat-mxc/ehci.c.
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*/
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static int initialize_otg_port(struct platform_device *pdev)
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{
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u32 v;
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void __iomem *usb_base;
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void __iomem *usbother_base;
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usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
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if (!usb_base)
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return -ENOMEM;
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usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
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/* Set the PHY clock to 19.2MHz */
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v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
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v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
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v |= MX51_USB_PLL_DIV_24_MHZ;
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__raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
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iounmap(usb_base);
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return 0;
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}
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static struct mxc_usbh_platform_data dr_utmi_config = {
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.init = initialize_otg_port,
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.portsc = MXC_EHCI_UTMI_16BIT,
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.flags = MXC_EHCI_INTERNAL_PHY,
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};
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/* PCBID2 PCBID1 PCBID0 STATE
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1 1 1 ER1:rev1.1
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1 1 0 ER2:rev1.2
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1 0 1 ER3:rev1.3
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1 0 0 ER4:rev1.4
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*/
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static void __init mx51_efikamx_board_id(void)
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{
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int id;
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/* things are taking time to settle */
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msleep(150);
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gpio_request(EFIKAMX_PCBID0, "pcbid0");
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gpio_direction_input(EFIKAMX_PCBID0);
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gpio_request(EFIKAMX_PCBID1, "pcbid1");
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gpio_direction_input(EFIKAMX_PCBID1);
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gpio_request(EFIKAMX_PCBID2, "pcbid2");
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gpio_direction_input(EFIKAMX_PCBID2);
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id = gpio_get_value(EFIKAMX_PCBID0);
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id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
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id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
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switch (id) {
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case 7:
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system_rev = 0x11;
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break;
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case 6:
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system_rev = 0x12;
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break;
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case 5:
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system_rev = 0x13;
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break;
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case 4:
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system_rev = 0x14;
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break;
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default:
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system_rev = 0x10;
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break;
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}
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if ((system_rev == 0x10)
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|| (system_rev == 0x12)
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|| (system_rev == 0x14)) {
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printk(KERN_WARNING
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"EfikaMX: Unsupported board revision 1.%u!\n",
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system_rev & 0xf);
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}
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}
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static struct gpio_led mx51_efikamx_leds[] = {
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{
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.name = "efikamx:green",
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.default_trigger = "default-on",
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.gpio = EFIKAMX_GREEN_LED,
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},
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{
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.name = "efikamx:red",
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.default_trigger = "ide-disk",
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.gpio = EFIKAMX_RED_LED,
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},
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{
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.name = "efikamx:blue",
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.default_trigger = "mmc0",
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.gpio = EFIKAMX_BLUE_LED,
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},
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};
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static struct gpio_led_platform_data mx51_efikamx_leds_data = {
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.leds = mx51_efikamx_leds,
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.num_leds = ARRAY_SIZE(mx51_efikamx_leds),
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};
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static struct platform_device mx51_efikamx_leds_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &mx51_efikamx_leds_data,
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},
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};
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static struct gpio_keys_button mx51_efikamx_powerkey[] = {
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{
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.code = KEY_POWER,
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.gpio = EFIKAMX_POWER_KEY,
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.type = EV_PWR,
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.desc = "Power Button (CM)",
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.wakeup = 1,
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.debounce_interval = 10, /* ms */
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},
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};
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static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = {
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.buttons = mx51_efikamx_powerkey,
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.nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey),
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};
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static struct mtd_partition mx51_efikamx_spi_nor_partitions[] = {
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{
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.name = "u-boot",
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.offset = 0,
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.size = SZ_256K,
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},
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{
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.name = "config",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_64K,
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},
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};
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static struct flash_platform_data mx51_efikamx_spi_flash_data = {
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.name = "spi_flash",
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.parts = mx51_efikamx_spi_nor_partitions,
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.nr_parts = ARRAY_SIZE(mx51_efikamx_spi_nor_partitions),
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.type = "sst25vf032b",
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};
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static struct spi_board_info mx51_efikamx_spi_board_info[] __initdata = {
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{
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.modalias = "m25p80",
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.max_speed_hz = 25000000,
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.bus_num = 0,
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.chip_select = 1,
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.platform_data = &mx51_efikamx_spi_flash_data,
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.irq = -1,
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},
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};
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static int mx51_efikamx_spi_cs[] = {
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EFIKAMX_SPI_CS0,
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EFIKAMX_SPI_CS1,
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};
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static const struct spi_imx_master mx51_efikamx_spi_pdata __initconst = {
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.chipselect = mx51_efikamx_spi_cs,
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.num_chipselect = ARRAY_SIZE(mx51_efikamx_spi_cs),
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};
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void mx51_efikamx_reset(void)
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{
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if (system_rev == 0x11)
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gpio_direction_output(EFIKAMX_RESET1_1, 0);
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else
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gpio_direction_output(EFIKAMX_RESET, 0);
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}
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static void __init mxc_board_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
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ARRAY_SIZE(mx51efikamx_pads));
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mx51_efikamx_board_id();
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mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
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mxc_init_imx_uart();
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imx51_add_sdhci_esdhc_imx(0, NULL);
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/* on < 1.2 boards both SD controllers are used */
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if (system_rev < 0x12) {
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imx51_add_sdhci_esdhc_imx(1, NULL);
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mx51_efikamx_leds[2].default_trigger = "mmc1";
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}
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platform_device_register(&mx51_efikamx_leds_device);
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imx51_add_gpio_keys(&mx51_efikamx_powerkey_data);
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spi_register_board_info(mx51_efikamx_spi_board_info,
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ARRAY_SIZE(mx51_efikamx_spi_board_info));
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imx51_add_ecspi(0, &mx51_efikamx_spi_pdata);
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if (system_rev == 0x11) {
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gpio_request(EFIKAMX_RESET1_1, "reset");
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gpio_direction_output(EFIKAMX_RESET1_1, 1);
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} else {
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gpio_request(EFIKAMX_RESET, "reset");
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gpio_direction_output(EFIKAMX_RESET, 1);
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}
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}
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static void __init mx51_efikamx_timer_init(void)
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{
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mx51_clocks_init(32768, 24000000, 22579200, 24576000);
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}
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static struct sys_timer mxc_timer = {
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.init = mx51_efikamx_timer_init,
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};
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MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
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/* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
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.boot_params = MX51_PHYS_OFFSET + 0x100,
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.map_io = mx51_map_io,
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.init_irq = mx51_init_irq,
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.init_machine = mxc_board_init,
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.timer = &mxc_timer,
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MACHINE_END
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