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3c677cc460
The Allwinner A31 DMA controller is rather simple to describe in the DT. Add the bindings documentation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
46 lines
1.3 KiB
Plaintext
46 lines
1.3 KiB
Plaintext
Allwinner A31 DMA Controller
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This driver follows the generic DMA bindings defined in dma.txt.
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Required properties:
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- compatible: Must be "allwinner,sun6i-a31-dma"
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- reg: Should contain the registers base address and length
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- interrupts: Should contain a reference to the interrupt used by this device
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- clocks: Should contain a reference to the parent AHB clock
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- resets: Should contain a reference to the reset controller asserting
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this device in reset
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- #dma-cells : Should be 1, a single cell holding a line request number
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Example:
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dma: dma-controller@01c02000 {
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compatible = "allwinner,sun6i-a31-dma";
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reg = <0x01c02000 0x1000>;
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interrupts = <0 50 4>;
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clocks = <&ahb1_gates 6>;
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resets = <&ahb1_rst 6>;
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#dma-cells = <1>;
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};
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Clients:
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DMA clients connected to the A31 DMA controller must use the format
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described in the dma.txt file, using a two-cell specifier for each
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channel: a phandle plus one integer cells.
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The two cells in order are:
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1. A phandle pointing to the DMA controller.
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2. The port ID as specified in the datasheet
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Example:
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spi2: spi@01c6a000 {
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compatible = "allwinner,sun6i-a31-spi";
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reg = <0x01c6a000 0x1000>;
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interrupts = <0 67 4>;
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clocks = <&ahb1_gates 22>, <&spi2_clk>;
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clock-names = "ahb", "mod";
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dmas = <&dma 25>, <&dma 25>;
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dma-names = "rx", "tx";
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resets = <&ahb1_rst 22>;
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};
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