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Until "x86: dt: Cleanup local apic setup" we read the local apic address from the MSR and ignored the entry in DT. Reflect this change in the documentation. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> LKML-Reference: <1298830419-22681-1-git-send-email-bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
27 lines
617 B
Plaintext
27 lines
617 B
Plaintext
Interrupt chips
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---------------
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* Intel I/O Advanced Programmable Interrupt Controller (IO APIC)
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Required properties:
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--------------------
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compatible = "intel,ce4100-ioapic";
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#interrupt-cells = <2>;
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Device's interrupt property:
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interrupts = <P S>;
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The first number (P) represents the interrupt pin which is wired to the
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IO APIC. The second number (S) represents the sense of interrupt which
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should be configured and can be one of:
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0 - Edge Rising
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1 - Level Low
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2 - Level High
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3 - Edge Falling
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* Local APIC
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Required property:
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compatible = "intel,ce4100-lapic";
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