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linux-next/drivers/gpu/drm/bridge
Russell King 622494a356 drm: bridge/dw_hdmi: adjust n/cts setting order
Patch derived from one from Yakir Yang.  Yakir Yang says:
For Designerware HDMI, the following write sequence is recommended:
1. aud_n3 (set bit ncts_atomic_write if desired)
2. aud_cts3 (set CTS_manual and CTS value if desired/enabled)
3. aud_cts2 (required in CTS_manual)
4. aud_cts1 (required in CTS_manual)
5. aud_n3 (bit ncts_atomic_write with same value as in step 1.)
6. aud_n2
7. aud_n1

However, avoid the ncts_atomic_write_bit and CTS_manual settings in this
patch, both of which are marked reserved in the iMX6 documentation.  All
iMX6 code in the wild seems to want CTS_manual cleared.

Having requested clarification from FSL, it appears that neither of
these bits are implemented in their version of the IP.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-03-30 19:42:37 +01:00
..
dw_hdmi.c drm: bridge/dw_hdmi: adjust n/cts setting order 2015-03-30 19:42:37 +01:00
dw_hdmi.h drm: bridge/dw_hdmi: add function dw_hdmi_phy_enable_spare 2015-01-07 18:31:59 +01:00
Kconfig drm/bridge: ptn3460: support drm_panel 2015-01-28 08:47:29 +01:00
Makefile drm: imx: imx-hdmi: move imx-hdmi to bridge/dw_hdmi 2015-01-07 18:31:56 +01:00
ptn3460.c drm/bridge: ptn3460: use gpiod interface 2015-01-28 08:47:29 +01:00